Parallel Execution Units for Cryptographic Hash Acceleration

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Solution Overview

Problem

Cryptographic hash computations are computationally intensive, leading to significant processor overhead and wasted computing cycles due to idle execution units, which impacts secure network performance.

Innovation Solution

A processor architecture utilizing multiple execution units that can perform cryptographic hash computations in parallel, where one unit processes a message schedule and another performs a compression function concurrently, reducing idle cycles and enhancing processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pipelining instructions are implemented on one execution unit, then cryptographic hash computation performance is improved, but other execution units remain idle wasting processor computing cycles

Engineering Contradiction:
Improvecryptographic hash computation performanceVSAvoidprocessor computing cycles
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the cryptographic hash computation into separate functional segments that can be executed on different execution units simultaneously. The first execution unit performs message schedule computation while the second execution unit performs compression function, allowing parallel processing that eliminates idle cycles and improves overall processor productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-unit processing to parallel multi-unit processing by adding a temporal and spatial dimension to the computation. Multiple execution units operate simultaneously on different parts of the hash computation, effectively utilizing processor resources and eliminating the idle time problem.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple execution units are used for parallel processing, then processor productivity is improved, but device complexity increases

Engineering Contradiction:
Improveprocessor computing cycles utilizationVSAvoidprocessor architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the cryptographic hash computation into distinct functional units (message schedule computation and compression function) that can be independently executed on separate execution units. This segmentation enables parallel processing while maintaining clear functional boundaries that simplify the overall architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent designs the execution units with universal capabilities to handle different parts of the hash computation. Each execution unit can perform both message schedule computation and compression function, providing flexibility and reducing the need for specialized hardware while maintaining parallel processing efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7599489B1Accelerating cryptographic hash computations
Publication Date: 2009.10.06 ORACLE AMERICAN INC
  • US7599489B1 patent drawing
  • US7599489B1 patent drawing
  • US7599489B1 patent drawing

AI summary

Provided is an apparatus and method for accelerating cryptographic hash computations. For example, in a cryptographic hash computation such as SHA-1, multiple execution units in a processor can process loosely coupled data. Specifically, after preprocessing a message with a particular bit length and parsing the padded message into multiple blocks, a first execution unit can begin processing the blocks for a message schedule computation. While the first block is processed, the first execution unit produces a partial result for the computation of the compression function in the second execution unit. By simultaneously processing the blocks on multiple execution units, the cryptographic hash computation performance can improve.