Parallel HBT Bump Layout With Recessed Landing Structure
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Solution Overview
Problem
The reliability of heterojunction bipolar transistors (HBTs) is affected during the packaging process, and the semiconductor structure occupies too much space.
Innovation Solution
A semiconductor structure is designed with multiple HBTs arranged in parallel on a substrate, featuring a landing structure with a recess or curved surface at the edge of the HBTs, along with wiring, insulating layers, and bumps for connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional bump structure is used during HBT packaging, then the packaging process can be completed, but the reliability of the HBT is affected and the device occupies too much space
Solution Approach 1:
The patent divides the bump structure into multiple segments: a first bump portion directly connected to the HBT, a second bump portion extending from the first bump portion, and a landing structure. This segmentation allows the bump to perform multiple functions (electrical connection, mechanical support, and space-efficient packaging) while improving reliability and reducing the overall device area.
Solution Approach 2:
The patent extends the bump structure in multiple dimensions - the first bump portion extends in a first direction from the HBT, while the second bump portion extends in a second direction from the first bump portion. This multi-dimensional arrangement optimizes space utilization and improves packaging efficiency without compromising reliability.
2Area of stationary object
If the semiconductor structure is designed to be compact, then the device area is reduced, but the reliability during packaging process is compromised
Solution Approach 1:
The patent applies different structural characteristics to different parts of the bump structure. The first bump portion has a first cross-sectional shape optimized for connection to the HBT, while the second bump portion has a second cross-sectional shape optimized for the landing structure. This local differentiation allows each part to perform its function optimally within a compact overall structure.
Solution Approach 2:
The bump structure is formed as a composite structure with different portions having different geometries and potentially different materials, allowing optimization of each portion for its specific function while maintaining overall compactness and reliability.
Data Source
AI summary
A semiconductor structure includes heterojunction bipolar transistors arranged in parallel and disposed on a substrate. The semiconductor structure also includes a landing structure disposed at the edge of the HBTs on the substrate. The semiconductor structure also includes wiring disposed on the HBTs and connected to the landing structure. The semiconductor structure also includes an insulating layer disposed on the landing structure and having a via. The semiconductor structure also includes a bump disposed on the top surface of the insulating layer and connected to the wiring through the via. The sidewall of the landing structure has a recess in a top view.