Parallel IGBT Switching Delay Compensation for Current Balance
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Solution Overview
Problem
In parallel operation of power semiconductor components, such as IGBTs, differences in switching delay times cause current imbalances due to varying properties of components from different vendors, leading to increased complexity and cost in measuring and compensating these delays.
Innovation Solution
Determining switching delay times based on collector to emitter voltages allows for synchronized control of parallel components, enabling even current division by adjusting switching pulses according to calculated delays, which can be implemented with simpler circuitry without the need for high-speed measurement components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage measurement over parasitic inductance is used to determine switching delay times, then time resolution of few nanoseconds is achieved, but measurement electronics complexity and cost increase due to high-speed components
Solution Approach 1:
The invention extracts the delay time information from the voltage waveform itself by detecting specific voltage levels (10% and 90% of full value) during switching transitions, rather than measuring the complete voltage across parasitic inductance. This eliminates the need for high-speed measurement electronics while retaining sufficient precision for compensation purposes.
Solution Approach 2:
The patent replaces expensive high-speed measurement components with simpler, lower-cost voltage detection circuitry that only needs to detect threshold crossings at 10% and 90% levels. These simpler components are sufficient for the application's precision requirements without demanding the performance of high-speed comparators and isolators.
2Adaptability or versatility
If components from different vendors are used simultaneously, then system versatility is improved, but switching delay time differences increase causing current imbalance
Solution Approach 1:
The invention implements a feedback mechanism where the actual switching delay times of each component are measured and stored, then used to adjust the gate control signals. This closed-loop approach compensates for manufacturer-specific variations and ensures current balance regardless of which vendor's components are used.
Solution Approach 2:
The patent changes the control parameter by introducing individual delay time adjustments for each parallel component. By modifying the gate control signal timing based on measured characteristics, the system adapts to components from different vendors while maintaining synchronized switching and current balance.
3Reliability
If switching delay compensation is implemented, then current balance between parallel legs is improved, but control system complexity increases
Solution Approach 1:
The invention performs preliminary measurement and storage of switching delay times for each component during setup or initial operation. This pre-characterization allows the control system to simply apply pre-calculated delay corrections without requiring complex real-time computation, reducing ongoing control complexity while maintaining current balance.
Data Source
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AI summary
A method and an apparatus for determining switching delay times of power semiconductor switch components in parallel connected half bridge legs in which two or more power semiconductor switches are controlled in parallel. The method comprises providing a gate control signal to gate drivers of the parallel connected power semiconductor switch components, determining collector to emitter voltages of the parallel connected power semiconductor switch components, and determining separate delay times for each of the parallel connected power semiconductor switch components based on the time instant of the gate control signal and the determined collector to emitter voltages or time derivatives of the determined collector to emitter voltages.