Parallel Impedance Calibration Circuit for Faster Memory Tuning
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Solution Overview
Problem
Conventional impedance calibration of memory devices is limited by insufficient accuracy and high error rates due to the use of limited calibration cycles, leading to internal impedance values that may fall out of specification.
Innovation Solution
An impedance calibration circuit comprising a first and second calibration circuit, a switch circuit, and a control circuit that performs multiple comparison operations simultaneously, reducing calibration time and increasing accuracy by selectively providing voltages to nodes and adjusting control signals based on comparison results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If limited calibration cycles are used for impedance calibration, then the calibration time is reduced, but the accuracy of impedance calibration deteriorates and error increases
Solution Approach 1:
The calibration circuit is divided into a first calibration circuit and a second calibration circuit, each performing different comparison operations. The first calibration circuit performs a first comparison operation between a calibration voltage and a first reference voltage, while the second calibration circuit performs a second comparison operation between the calibration voltage and a second reference voltage. This segmentation allows parallel processing of multiple comparisons, reducing total calibration time while maintaining accuracy through multiple simultaneous measurements.
Solution Approach 2:
The patent implements continuous calibration action by having both calibration circuits operate simultaneously in parallel. The switch circuit enables both first and second comparison operations to occur at the same time, ensuring that useful calibration action continues without interruption or sequential delays, thereby reducing overall calibration time while maintaining measurement accuracy through concurrent operations.
2Productivity
If limited calibration cycles are used, then the calibration process is faster, but the internal impedance may fall out of specification
Solution Approach 1:
The control circuit receives comparison results from both the first and second calibration circuits and uses this feedback to adjust the calibration process. The control circuit generates control signals based on the comparison results, enabling dynamic adjustment of calibration parameters. This feedback mechanism ensures that the calibration process reliably converges to the correct impedance value within reduced time, maintaining specification compliance while improving speed.
Solution Approach 2:
The patent performs excessive comparison operations by implementing both a first comparison operation and a second comparison operation simultaneously, where the second comparison operation provides additional verification beyond what a single calibration circuit would provide. This excessive action ensures higher reliability and specification compliance by cross-validating results through multiple parallel comparison paths, while the overall process remains fast due to the parallel execution.
3Measurement precision
If multiple comparison operations are performed simultaneously, then calibration accuracy improves, but circuit complexity increases
Solution Approach 1:
The switch circuit serves multiple functions: it connects the calibration voltage to both the first calibration circuit and the second calibration circuit, it selects reference voltages for both comparison operations, and it manages the timing and coordination of parallel operations. This multi-functionality reduces the need for separate dedicated components for each function, thereby implementing multiple comparison operations with moderate circuit complexity rather than requiring entirely separate independent calibration systems.
Data Source
AI summary
An impedance calibration circuit includes first and second calibration circuits, a switch circuit and a control circuit. The first calibration circuit is coupled to an external resistance, and generates a first voltage. The second calibration circuit generates second and third voltages. The switch circuit is coupled to the first and second calibration circuits. The switch circuit selectively provides the first, second, and third voltages to first and second nodes. The control circuit is coupled to the first and second nodes. The control circuit generates first, second, and third control signals according to voltages of the first and second nodes. In a first time interval, the switch circuit provides the first voltage to the first and second nodes. In a second time interval, the switch circuit provides the second voltage to the first and second nodes, or provides the second and third voltages respectively to the first and second nodes.