Parallel Inductor Patterns Reduce Resistance and Peeling
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Solution Overview
Problem
Existing electronic components with capacitors and inductors face issues of increased resistance values and interfacial peeling due to high-stress insulating materials, which worsen with thicker conductive layers.
Innovation Solution
The electronic component design includes a first conductive layer with a reduced thickness for the lower electrode and inductor pattern, connected in parallel with a second inductor pattern through via conductors, covered by an insulating layer and a passivation film, to reduce resistance and prevent peeling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the conductive layer is reduced to prevent interfacial peeling, then the reliability of the interface is improved, but the resistance value of the inductor pattern increases
Solution Approach 1:
The inductor pattern is divided into two separate conductive layers (first conductive layer and second conductive layer) connected through via conductors. This segmentation allows each layer to have optimized thickness for preventing peeling while the parallel connection maintains low resistance
Solution Approach 2:
The solution transitions from a single-plane inductor to a three-dimensional structure spanning multiple conductive layers. The via conductors provide vertical connections, adding the depth dimension to achieve both low resistance and peeling prevention
2Reliability
If the thickness of the first conductive layer is reduced, then interfacial peeling is prevented, but the level difference increases
Solution Approach 1:
Different conductive layers have different thicknesses optimized for their specific functions. The first conductive layer is thinner to prevent peeling at its interface, while the second conductive layer can be thicker to compensate and reduce overall level difference
Solution Approach 2:
By distributing the inductor pattern across multiple layers with different thicknesses, the solution uses the vertical dimension to balance the level difference while maintaining interface reliability
Data Source
AI summary
Disclosed herein is an electronic component that includes a first conductive layer including a lower electrode and a first inductor pattern, a dielectric film that covers the lower electrode, an upper electrode laminated on the lower electrode through the dielectric film, an insulating layer that covers the first conductive layer, dielectric film, and upper electrode, and a second conductive layer formed on the insulating layer and including a second inductor pattern. The first and second inductor patterns are connected in parallel through via conductors penetrating the insulating layer.