Parallel Inverter Control via Hysteresis Current Synchronization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multi-inverter power converters face challenges in synchronizing switching among parallel inverters, leading to thermal stress, delamination, and chaotic electrical performance due to differing thermal properties and timing offsets, resulting in component failures and inefficiencies.
Innovation Solution
A control apparatus with a support structure, control logic circuit, and output terminal generates control signals for multiple parallel-connected inverters, using a common controller to synchronize switching based on sampled output currents and reference values, facilitating sub-microsecond timing and thermal balancing through hysteresis current control and phase shift compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple inverters are connected in parallel to handle large electrical loads, then the power handling capability is improved, but synchronization difficulties arise leading to chaotic electrical performance and current fluctuations
Solution Approach 1:
The patent merges multiple inverter units into a coordinated parallel system with a centralized control mechanism. The control system integrates timing signals and synchronization protocols across all inverter modules, ensuring unified operation. This merging approach allows the system to handle large electrical loads while maintaining stable electrical performance through coordinated switching actions.
Solution Approach 2:
The patent implements feedback mechanisms that continuously monitor the operational state of each inverter unit and adjust control signals accordingly. Synchronization feedback loops detect timing deviations and correct them in real-time, preventing chaotic electrical performance. Current sensing and voltage regulation feedback ensure that each inverter contributes evenly to the total load, maintaining system reliability.
2Adaptability or versatility
If semiconductor power switches are operated with frequent on/off cycling to control power output, then the power control flexibility is improved, but thermal stress increases causing delamination, debonding, and fatigue cracking
Solution Approach 1:
The patent employs periodic switching patterns with optimized duty cycles that reduce thermal stress accumulation. By structuring the on/off cycling to follow predictable periodic patterns with adequate off-time for thermal dissipation, the system maintains power control flexibility while preventing excessive thermal buildup that would cause delamination or fatigue cracking.
Solution Approach 2:
The patent dynamically adjusts switching parameters such as frequency, duty cycle, and pulse width based on thermal conditions and load requirements. When thermal stress approaches critical levels, the control system modifies switching parameters to reduce cycling frequency or extend off-periods, thereby maintaining structural integrity while preserving adequate power control capability through parameter optimization.
3Device complexity
If a common control apparatus is used to control multiple parallel inverters, then the device complexity is reduced, but the difficulty of achieving precise synchronization increases
Solution Approach 1:
The patent segments the control function into modular components distributed across each inverter unit, with each module receiving synchronized timing signals from a central clock source. This segmentation allows the common control apparatus to maintain simplicity while achieving precise synchronization through localized control modules that independently execute switching actions based on unified timing references.
Solution Approach 2:
The patent introduces intermediary synchronization signals and timing reference circuits that mediate between the common control apparatus and individual inverter units. These intermediary elements translate centralized control commands into precisely timed local switching actions, enabling the simple common controller to achieve high synchronization precision through intermediate signal conditioning and distribution stages.
Data Source
AI summary
A control apparatus includes a control logic circuit that is configured to generate control signals for controlling at least two inverters (e.g., 3-phase inverters) that are coupled in parallel. The control logic circuit is configured to sample output currents present in common load terminals of the inverters, and to compare the sampled currents to generated current references. The output currents may be sampled, and/or the current references generated, at a fixed rate. Errors between the sampled currents and current references are evaluated against hysteresis dead bands around the current references. The control signals are generated based on (i) retrieved modulator output values for a selected one of the inverters and (ii) the errors as evaluated against the hysteresis dead bands. The control logic circuit may implement first and second counters for coordinating the current reference generation, sampling the output currents, retrieving the modulator output values, etc.


