Parallel Three-Level Inverter Control for Waveform Quality and Size Reduction
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Solution Overview
Problem
Three-level inverters face challenges in reducing size and increasing efficiency while minimizing distortion in output waveforms, due to the need for large capacitors and AC reactors, which enlarges the inverter device and increases switching losses.
Innovation Solution
A control method for an inverter device that includes two three-level inverters connected in parallel, with a control circuit that duty-controls one inverter at a high frequency to switch output levels, and stops or adjusts duty control of the other inverter based on voltage conditions, reducing the number of switching operations and reactor size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the capacitance of the two capacitors is increased to reduce output waveform distortion, then the waveform quality improves, but the inverter device size increases
Solution Approach 1:
The patent applies dynamic control by switching between two operational modes: duty-cycle control for one inverter and level switching control for the other. This dynamic control strategy allows the system to maintain waveform quality while reducing the required capacitor capacitance and overall device size, as the active duty-cycle control compensates for waveform distortion without requiring oversized passive components.
Solution Approach 2:
The patent changes the control parameter from continuous duty-cycle modulation of both inverters to a hybrid approach where one inverter uses duty-cycle control and the other uses discrete level switching. This parameter change in control strategy reduces the demand on capacitor sizing while maintaining output waveform quality, thereby reducing inverter device size.
2Manufacturing precision
If the AC reactor size is increased to reduce output waveform distortion, then the waveform quality improves, but the inverter device size increases
Solution Approach 1:
The patent employs dynamic duty-cycle control of one inverter to actively compensate for waveform distortion, replacing the need for large AC reactors. This dynamic control approach maintains waveform quality through active management rather than passive filtering, significantly reducing the required AC reactor size and overall device volume.
3Manufacturing precision
If the number of switching operations is increased to improve output waveform quality, then the waveform quality improves, but the switching loss increases
Solution Approach 1:
The patent dynamically assigns different control roles to the two inverters: one operates with continuous duty-cycle control requiring frequent switching, while the other operates with discrete level switching requiring fewer switching operations. This dynamic division of labor maintains output waveform quality through the actively controlled inverter while minimizing switching losses in the passively controlled inverter.
Solution Approach 2:
The patent applies partial duty-cycle control to only one of the two inverters, rather than controlling both inverters with high-frequency switching. This partial action approach maintains waveform quality where needed while reducing the total number of switching operations and associated switching losses across the system.
4Volume of stationary object
If one inverter is controlled at high frequency and the other at low frequency, then the device size is reduced and switching loss decreases, but output waveform distortion increases
Solution Approach 1:
The patent implements dynamic control where the high-frequency duty-cycle controlled inverter actively compensates for the waveform distortion introduced by the low-frequency level-switching inverter. This dynamic compensation mechanism maintains output waveform quality while allowing the system to benefit from reduced device size and lower switching losses through the asymmetric frequency control strategy.
Data Source
AI summary
An inverter device (1), including a first inverter (10), and a second inverter (20) connected in parallel to the first inverter. Both the first and second inverters (10, 20) are three-level inverters. The first and second inverters (10, 20) generate first and second output voltages (V1, V2) using the voltage (Vc) at the connection point between a first capacitor (C1) and a second capacitor (C2) connected in series and evenly allocating a power supply voltage (Vin). A control circuit (40) duty-controls the second inverter at high frequency, when the second inverter (20) switches the level of the second output voltage (V2).