Parallel Ion Implantation Simulation Blocks

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Solution Overview

Problem

Conventional semiconductor process simulation methods are time-consuming due to their sequential nature, which becomes increasingly inefficient as semiconductor devices become more highly integrated and miniaturized, necessitating a method to shorten simulation time without compromising reliability.

Innovation Solution

The proposed solution involves classifying semiconductor process simulations into blocks based on annealing simulations and performing multiple ion implantation simulations in parallel, utilizing a device with an input database, process simulator, and output database to execute these simulations efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor process simulation is performed sequentially according to process sequence, then simulation reliability is maintained, but simulation time increases significantly

Engineering Contradiction:
Improvesimulation reliabilityVSAvoidsimulation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the semiconductor process simulation into multiple independent blocks, where each block contains specific process steps that can be simulated independently. This segmentation allows parallel execution of multiple blocks while maintaining the integrity of each simulation unit, thereby reducing total simulation time without compromising reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary analysis to identify independent simulation blocks before executing the full simulation. By pre-processing the simulation structure and determining which blocks can be executed in parallel, the system prepares the simulation framework in advance to enable time-efficient parallel processing while ensuring reliability through proper block dependency management.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple ion implantation simulations are performed in parallel, then simulation speed increases, but simulation complexity increases

Engineering Contradiction:
Improvesimulation speedVSAvoidsimulation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments ion implantation simulations into distinct, independent blocks that can be executed in parallel. Each block represents a self-contained simulation unit with defined inputs and outputs, reducing the overall complexity management while enabling simultaneous execution to improve simulation speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates multiple copies of the ion implantation simulation framework, where each copy processes a specific block independently. This copying approach allows parallel execution of identical simulation routines on different data sets, increasing productivity while keeping individual simulation units simple and manageable.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces simulation time by allowing simultaneous execution of ion implantation simulations, enhancing simulation speed while maintaining reliability by reordering and resetting sequences based on defect analysis.

Implementation Method 1

classifying a semiconductor process simulation into a plurality of blocks based on an annealing simulation

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

performing at least two ion implantation simulations among a plurality of ion implantation simulations corresponding to the selected block in parallel

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS10068038B2Semiconductor process simulation device and simulation method thereof
Publication Date: 2018.09.04 SAMSUNG ELECTRONICS CO LTD
  • US10068038B2 patent drawing
  • US10068038B2 patent drawing
  • US10068038B2 patent drawing

AI summary

A semiconductor process simulation method includes classifying a semiconductor process simulation into a plurality of blocks based on an annealing simulation, performing a shape simulation corresponding to a block selected from the plurality of blocks, and performing at least two ion implantation simulations among a plurality of ion implantation simulations corresponding to the selected block in parallel, based on result data of the shape simulation corresponding to the selected block.