Parallel LDPC Encoder Using Recursive Parity Check Calculation

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Solution Overview

Problem

Low-density parity check (LDPC) encoders face challenges with high error floors and large memory and computational requirements, leading to increased latency, especially when implementing low error floor codes with lengthy code block lengths.

Innovation Solution

A parallel LDPC encoder calculates parity check values using a matrix-vector multiplication unit and parallel recursion to efficiently compute parity check values, reducing latency by calculating first and second sets of parity check values in parallel, thereby minimizing overall encoding time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC codes use large code block lengths to achieve low error floors, then reliability is improved, but latency increases due to large memory buffers and computational power requirements

Engineering Contradiction:
Improveerror floorVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The parity check matrix H is divided into multiple sub-matrices (H1, H2, ..., Hm), and the encoding process is segmented into parallel recursive calculations. Each sub-matrix corresponds to a portion of parity check values that can be computed independently and in parallel, reducing the overall computational time and latency while maintaining the reliability benefits of long code block lengths

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The encoder uses a dynamic parallel recursion approach where multiple parity check values are calculated simultaneously through recursive relations. This dynamic parallel processing adapts to the matrix structure and computes different portions of the codeword concurrently, reducing latency without compromising the error floor performance

Inventive Principle:
Principle #15Dynamics

2Reliability

If LDPC codes use large code block lengths to achieve low error floors, then reliability is improved, but device complexity increases due to large memory buffers and computational power requirements

Engineering Contradiction:
Improveerror floorVSAvoidmemory buffers and computational power
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The large-scale encoding problem is segmented into smaller sub-problems by dividing the parity check matrix into sub-matrices. Each sub-matrix processing unit requires less memory and computational resources individually, yet collectively they achieve the same reliability as the full large-block code without requiring proportionally large memory buffers or computational power

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The parallel recursion computes only the necessary portions of parity check values in each processing stage rather than computing all values sequentially. This partial action approach reduces the instantaneous memory and computational requirements while still achieving the complete encoding needed for low error floor performance

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8812930B1Parallel encoder for low-density parity-check (LDPC) codes
Publication Date: 2014.08.19 NXP USA INC
  • US8812930B1 patent drawing
  • US8812930B1 patent drawing
  • US8812930B1 patent drawing

AI summary

A low-density parity check (LDPC) encoder that calculate parity check values for a message using an LDPC parity check matrix is provided. A matrix-vector multiplication unit is operative to multiply a portion of the LDPC parity check matrix and the message to obtain an intermediate vector. A parallel recursion unit is operative to recursively calculate a first plurality of parity check values for the message based on the intermediate vector and to recursively calculate a second plurality of parity check values for the message based on the intermediate vector. The first plurality of parity check values are calculated in parallel with the second plurality of parity check values.