Terminal Information Processing With Parallel Machine Learning Circuits

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Solution Overview

Problem

General-purpose processors face inefficiencies and delays in processing information due to high load, limiting the speed and efficiency of obtaining information, particularly in machine learning operations.

Innovation Solution

A computation device with a primary processing circuit and multiple secondary processing circuits that perform parallel operations, interconnected through a PCIE bus, allowing for large-scale machine learning operations and optimized data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a general-purpose processor is used to obtain information by running applications, then the terminal device can perform diverse functions, but the processing efficiency is low and delay is long when the processor has large load

Engineering Contradiction:
Improveinformation processing efficiencyVSAvoidprocessing delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the processing system into a general-purpose processor for diverse functions and a dedicated computation device for machine learning operations. The computation device includes multiple processing circuits (first processing circuit, second processing circuit, third processing circuit) that handle different computational tasks independently, enabling parallel processing and reducing overall delay while maintaining high processing efficiency for information acquisition.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a computation device with multiple processing circuits is used to perform machine learning operations, then the processing speed and efficiency are improved, but the device complexity increases

Engineering Contradiction:
Improvemachine learning processing speedVSAvoidcomputation device structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple processing circuits (first, second, and third processing circuits) into a single computation device that is integrated with the terminal device. These circuits work together in a coordinated manner under the control of the general-purpose processor, allowing the system to achieve high processing speed for machine learning operations while managing complexity through integration rather than separate independent units.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12461711B2Information processing method and terminal device
Publication Date: 2025.11.04 SHANGHAI CAMBRICON INFORMATION TECH CO LTD
  • US12461711B2 patent drawing
  • US12461711B2 patent drawing
  • US12461711B2 patent drawing

AI summary

Disclosed are an information processing method and a terminal device. The method comprises: acquiring first information, wherein the first information is information to be processed by a terminal device; calling an operation instruction in a calculation apparatus to calculate the first information so as to obtain second information; and outputting the second information. By means of the embodiments in the present disclosure, a calculation apparatus of a terminal device can be used to call an operation instruction to process first information, so as to output second information of a target desired by a user, thereby improving the information processing efficiency.