Parallel Memory Access for Faster Volatile Data Acquisition
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Solution Overview
Problem
Current methods for accessing volatile memory in digital investigations face challenges in maintaining data integrity due to the risk of operating system overwrites during data acquisition, leading to consistency issues as data is typically read serially, increasing acquisition time with larger memory sizes.
Innovation Solution
A method and system that send read requests for multiple memory locations in parallel based on an upper bound of constraints, utilizing a summation function to receive a summed value for reconstructing memory content, thereby reducing data access time and improving data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is read serially from volatile memory, then data integrity can be maintained, but acquisition time increases significantly with larger memory sizes
Solution Approach 1:
The memory acquisition process is segmented into multiple parallel read operations. Instead of reading memory locations sequentially one by one, the system divides the memory into multiple segments and reads multiple segments simultaneously using parallel read commands, thereby reducing total acquisition time while maintaining data integrity through coordinated control of each segment's read operation
Solution Approach 2:
The system performs preliminary actions by sending read requests for multiple memory locations before the operating system can overwrite them. By proactively initiating multiple parallel read operations at once, the system captures data from multiple locations simultaneously before any potential overwriting occurs, thus reducing acquisition time while preserving data integrity
2Productivity
If multiple memory locations are read in parallel, then acquisition time is reduced, but the complexity of managing read requests increases
Solution Approach 1:
The controller is designed with multi-functionality to handle diverse read request scenarios. It can manage parallel read operations across multiple memory locations, coordinate with the operating system to prevent overwrites, and adapt to different memory configurations, thereby reducing acquisition speed without proportionally increasing controller complexity
Solution Approach 2:
The system implements feedback mechanisms where the controller monitors the status of parallel read operations and adjusts subsequent read requests based on completed operations and operating system activity. This feedback loop enables efficient coordination of multiple parallel reads while maintaining manageable controller complexity through adaptive control
3Productivity
If the operating system continues to write to memory during acquisition, then system operations continue, but data consistency is compromised
Solution Approach 1:
The system applies preliminary anti-action by proactively sending read requests for multiple memory locations before the operating system can overwrite them. This preemptive approach captures data from multiple locations simultaneously, counteracting the potential harmful effect of OS overwriting and maintaining data consistency while allowing system operations to continue
Solution Approach 2:
The controller performs preliminary actions by initiating parallel read operations before memory overwriting occurs. By reading multiple locations in advance of potential overwrites, the system preserves data consistency while maintaining system continuity, as the reads are completed before the OS can corrupt the data
Data Source
AI summary
A method and system for accessing a memory for a data processing system. The method comprises sending a read request for a plurality of locations in the memory to read the plurality of locations in parallel based on an upper bound for reading the memory. The upper bound for a number of locations is based on a group of constraints for the memory. The method receives a summed value of a plurality of memory values in the plurality of locations in the memory.