Parallel MMC Converter Control for Capacitor Voltage Balancing

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Solution Overview

Problem

The existing converter technologies face challenges in minimizing the disturbances caused by mismatches between modular-multilevel converters (MMCs) when operating in parallel, leading to inefficiencies and potential damage due to unbalanced capacitor voltages and increased losses.

Innovation Solution

A method is introduced that involves a control arrangement generating multiple voltage reference signals based on DC voltage references and measured signals from each MMC, which are combined into branch control signals to balance capacitor voltages across each branch, thereby reducing the influence of mismatches between MMCs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple MMCs are connected in parallel to achieve higher current flow, then the current capacity is improved, but mismatches between MMCs cause disturbances and unbalanced capacitor voltages

Engineering Contradiction:
Improvecurrent capacityVSAvoidoperation stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The control arrangement dynamically adjusts control parameters (voltage reference signals) for each MMC based on real-time measured signals and capacitor voltage states. This adaptive parameter adjustment compensates for mismatches between parallel MMCs, ensuring balanced operation while maintaining high current capacity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The control arrangement continuously measures signals from each MMC and uses this feedback information to generate appropriate voltage reference signals. This closed-loop feedback mechanism detects and corrects imbalances in capacitor voltages, maintaining operational stability despite mismatches between parallel converters

Inventive Principle:
Principle #23Feedback

2Device complexity

If simple control methods are used for parallel MMCs, then the device complexity is reduced, but capacitor voltage imbalances and losses increase

Engineering Contradiction:
Improvecontrol complexityVSAvoidconverter losses
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The control arrangement processes each MMC independently by generating individual voltage reference signals for each converter based on its specific measured signals. This segmented control approach allows precise optimization of each MMC's operation, minimizing losses while keeping the overall control structure manageable through modular processing

Inventive Principle:
Principle #1Segmentation

3Device complexity

If no compensation for mismatches is applied, then the device complexity is reduced, but unbalanced capacitor voltages cause potential damage

Engineering Contradiction:
Improvecontrol structure complexityVSAvoidcapacitor voltage imbalance
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The control arrangement proactively compensates for mismatches by generating customized voltage reference signals for each MMC before imbalances can develop into harmful conditions. This preliminary corrective action prevents capacitor voltage imbalances and potential damage without requiring complex real-time intervention structures

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS20230318474A1Method for Operating a Converter, Converter and Computer Program Product
Publication Date: 2023.10.05 HITACHI ENERGY LTD
  • US20230318474A1 patent drawing
  • US20230318474A1 patent drawing
  • US20230318474A1 patent drawing

AI summary

A method can be used for operating a converter that converter includes a control arrangement and modular-multilevel converters that are coupled in a parallel circuit. Each modular-multilevel converters includes branches, each having a cell with a capacitor and semiconductor switches. First voltage reference signals are generated as a function of a DC voltage reference and measured signals gained at the modular-multilevel converters and a second voltage reference signal is generated as a function of a first terminal reference. An inner voltage reference signal is generated as a function of an average DC voltage reference and of branch capacitor voltage signals. The first voltage reference signals, the second voltage reference signal and the inner voltage reference signal are combined into a branch control signal for each branch. Cell control signals are generated as a function of the branch control signals and provided to the semiconductor switches.