Parallel Model Processing With Matrix Partitioning Under Memory Limits

The patent partitions large data matrices into multiple submatrices (first data submatrices and second data submatrices) that are distributed across N computing devices. Each device processes a specific partition, enabling parallel computation of matrix multiplication operations. This segmentation allows the system to handle ultra-large-scale models that exceed the memory capacity of a single device while maintaining efficient parallel processing.

The patent introduces a coordinate mapping mechanism that acts as an intermediary to manage data distribution and communication between computing devices. The mapping relationship between global coordinates and local coordinates enables each device to efficiently access and process the required submatrices without complex point-to-point communication, thereby reducing communication overhead while maintaining parallel processing efficiency.

The patent divides large data matrices that exceed single-device memory capacity into multiple smaller submatrices that can be stored and processed on individual computing devices. Each device holds only the submatrices required for its computation, dramatically reducing per-device memory requirements while enabling the processing of ultra-large-scale models through coordinated parallel computation.

The patent transitions from a single-device memory constraint to a distributed multi-device architecture, adding the dimension of spatial distribution across multiple computing devices. This dimensional change allows the system to handle datasets that would be impossible to store on a single device by distributing the data across the memory resources of N devices, effectively multiplying the available memory capacity.

The patent performs preliminary coordinate mapping and data distribution setup before the actual matrix multiplication operations begin. By pre-establishing the mapping relationships between global and local coordinates and pre-distributing the required submatrices to appropriate computing devices, the system minimizes communication overhead during the computation phase, allowing parallel processing to proceed with reduced bandwidth consumption.

The patent enables each computing device to process only the local submatrices relevant to its computation, rather than requiring all devices to access or process the entire dataset. This local quality approach reduces the communication bandwidth required, as each device communicates only the specific data portions it needs, minimizing redundant data transmission while maintaining high processing speed through parallel operations.