Parallel Modular Multiplication Using Segmented Carry-Sum Processing
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Solution Overview
Problem
Modular multiplications of large operands are inefficient due to the iterative computation of carry and sum results, which depend on previous results, leading to suboptimal performance in public-key cryptosystems.
Innovation Solution
A modular operation device and method that divides operands into blocks, utilizing multiple processing elements to compute carry and sum results in parallel, followed by a reduction step to obtain the final remainder, optimizing the computation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If iterative computation of carry and sum results is used, then modular multiplication can be performed with simple sequential logic, but computation efficiency deteriorates due to dependencies between operations
Solution Approach 1:
The patent divides the modular multiplication computation into independent segments by separating carry result computation from sum result computation. Multiple processing elements can simultaneously compute different carry results without waiting for each other, eliminating the sequential dependency bottleneck while maintaining computational correctness through structured data flow management.
Solution Approach 2:
The patent transforms the computation from a single-dimensional sequential process into a multi-dimensional parallel structure. By organizing processing elements in arrays and introducing multiple computation dimensions (carry computation dimension, sum computation dimension, reduction dimension), the system achieves parallel execution without requiring complex inter-dependency management.
2Speed
If parallel processing elements are introduced, then computation speed improves, but device complexity increases due to additional hardware components
Solution Approach 1:
The processing elements in the patent are designed as universal units that can perform multiple functions: computing carry results, computing sum results, and participating in reduction operations. This multi-functionality reduces the total number of specialized components needed while maintaining parallel computation capabilities, thus improving speed without proportionally increasing device complexity.
Solution Approach 2:
The patent merges the carry computation function and sum computation function into the same processing elements. Instead of having separate dedicated carry units and sum units, each processing element can handle both types of computations at different time stages, reducing hardware overhead while achieving parallel acceleration of the overall modular multiplication process.
Data Source
AI summary
A modular operation device for handling a modular multiplication, comprises a controller, configured to divide a multiplicand into a plurality of multiplicand words, a multiplier into a plurality of multiplier words, and a modulus into a plurality of modulus words; a first plurality of processing elements, coupled to the controller, configured to compute a first plurality of updated carry results and a first plurality of updated sum results; a second plurality of processing elements, coupled to the controller, configured to compute a second plurality of updated carry results and a second plurality of updated sum results; and a reduction element, coupled to the controller, configured to compute a resulting remainder according to the second plurality of updated carry results and the second plurality of updated sum results.