Parallel Monte Carlo Circuit Simulation for Chip Yield Estimation

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Solution Overview

Problem

Existing methods for estimating chip yield rates, such as using normal distribution functions or full Monte Carlo simulations, are either inaccurate or excessively time-consuming, especially in advanced manufacturing processes where transistor characteristics deviate from original distributions.

Innovation Solution

Performing parallel Monte Carlo simulations on a basic circuit with fewer transistors, using a netlist file and process model data to generate performance results, selecting component parameters below a predetermined yield rate, and determining if the estimated yield rate meets the requirement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If Monte Carlo simulation is performed on all circuits in the chip, then yield rate estimation accuracy is improved, but simulation time becomes excessively long

Engineering Contradiction:
Improveyield rate estimation accuracyVSAvoidsimulation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the chip into multiple circuit units and performs Monte Carlo simulations on representative circuits rather than all circuits simultaneously. This segmentation allows parallel processing and reduces the total simulation time while maintaining accurate yield rate estimation through statistical representation of the entire chip.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs Monte Carlo simulations on a partial set of representative circuits instead of all circuits in the chip. By selecting circuits that represent the critical paths and manufacturing variations, the patent achieves sufficient accuracy without the excessive time cost of simulating every circuit individually.

Inventive Principle:
Principle #16Partial or excessive action

2Loss of time

If normal distribution function is used for yield rate estimation, then calculation time is reduced, but estimation accuracy deteriorates in advanced manufacturing processes

Engineering Contradiction:
Improvecalculation timeVSAvoidyield rate estimation accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent changes the mathematical model from a fixed normal distribution function to a dynamic Monte Carlo simulation approach that adapts to actual manufacturing variations. This parameter change allows the system to maintain accuracy in advanced manufacturing processes where transistor characteristics deviate from original distributions, while still managing calculation time through efficient simulation techniques.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12481815B2Circuit simulation method and circuit simulation system
Publication Date: 2025.11.25 REALTEK SEMICON CORP
  • US12481815B2 patent drawing
  • US12481815B2 patent drawing
  • US12481815B2 patent drawing

AI summary

A circuit simulation method includes the following operations: performing Monte Carlo simulations in parallel according to a first netlist file and process model data, in order to generate a performance simulation result, in which the first netlist file is configured to indicate a basic circuit in a circuitry; selecting component parameters lower than a predetermined yield rate according to the performance simulation result; and determining whether an estimated yield rate of the circuitry meets the predetermined yield rate according to the component parameters.