Parallel MOS Transistors with Variable Depth Isolation Trenches
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Solution Overview
Problem
Integrated circuits with transistors connected in parallel face challenges in achieving optimal isolation and minimizing leakage currents due to uniform design rules for trench dimensions, which can lead to inefficient use of space and increased threshold voltage.
Innovation Solution
The design incorporates a combination of first and second transistors with specific trench dimensions and configurations, where the depth of the first trenches is smaller than the second trenches, and the maximum width of the second trenches is independent of their depth, allowing for varied trench shapes and sizes to optimize electrical isolation and threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If uniform design rules are applied to all trench dimensions in parallel transistor configurations, then manufacturing simplicity is maintained, but threshold voltage increases and surface area consumption increases
Solution Approach 1:
The patent applies different trench depth dimensions to different transistor types within the same integrated circuit. Specifically, first trenches separating parallel transistors have a first depth, while second trenches isolating transistor groups from other circuits have a second depth greater than the first. This local differentiation optimizes threshold voltage and reduces surface area consumption without compromising manufacturing feasibility.
2Reliability
If trench width is increased to reduce leakage currents between parallel transistors, then electrical isolation is improved, but surface area consumption increases
Solution Approach 1:
The patent transitions from optimizing trench isolation primarily in the horizontal dimension (width) to optimizing it in the vertical dimension (depth). By increasing trench depth rather than width, the patent achieves improved electrical isolation and reduced leakage currents between parallel transistors without proportionally increasing surface area consumption.
3Reliability
If deeper trenches are used for all isolation purposes, then electrical isolation is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent segments the isolation trenches into two distinct types with different depth characteristics: first trenches for separating parallel transistors (shallower) and second trenches for isolating transistor groups from other circuits (deeper). This segmentation allows optimization of electrical isolation at different hierarchical levels without uniformly increasing manufacturing complexity across the entire circuit.
Data Source
AI summary
An electronic chip is provided that includes a plurality of first transistors electrically coupled to one another in parallel. A plurality of first isolating trenches is included in the electronic chip, and the first transistors are separated from one another by the first isolating trenches. Each of the first isolation trenches has a depth and a maximum width, and the depth depends on, or is a function of, the maximum width.