Parallel Motion Estimation Architecture with Local Buffers

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Solution Overview

Problem

High performance motion estimation in video processing is limited by memory bandwidth and computational parallelism, leading to high power dissipation and inefficient resource utilization.

Innovation Solution

A parallel motion estimation architecture that exploits inherent parallelism in the algorithm by performing search operations in different reference frames and macro-blocks in parallel or pipelined fashion, using local buffers to reduce memory access and optimize bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory bandwidth is increased to support larger data traffic for motion estimation, then computational parallelism is improved, but power dissipation increases

Engineering Contradiction:

Improvecomputational parallelismVSAvoidpower dissipation

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The reference frame is divided into multiple tiles, and each tile is further segmented into prediction units (PUs). This segmentation allows parallel processing of different tiles and PUs simultaneously, increasing computational parallelism without requiring a single high-bandwidth memory interface. Each processing element can access local buffer data independently, reducing the peak memory bandwidth requirement while maintaining high parallelism.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Reference picture data is pre-loaded into local buffers before the actual motion estimation processing begins. This preliminary action stores frequently accessed reference data in on-chip memory, eliminating the need for repeated high-bandwidth memory accesses during parallel processing operations, thus reducing power dissipation while maintaining high computational throughput.

Inventive Principle:

Principle #10Preliminary action

2Speed

If hardware throughput is increased to achieve high performance motion estimation, then processing speed is improved, but resource utilization efficiency decreases

Engineering Contradiction:

Improveprocessing speedVSAvoidresource utilization efficiency

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The architecture employs dynamic resource allocation where processing elements are activated based on the actual workload. The number of parallel processing elements can be adjusted dynamically, and resources are allocated to different tiles and PUs as needed. This dynamic approach maintains high processing speed when needed while improving resource utilization efficiency by avoiding static over-provisioning of hardware resources.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The processing elements are designed to be universal and can handle multiple functions including different prediction modes (inter-prediction, intra-prediction), different block sizes, and different reference frame configurations. This multi-functionality allows a single set of hardware resources to process diverse video coding scenarios, improving resource utilization efficiency while maintaining high processing speed through parallel operation when multiple functions are executed simultaneously.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12394014B2Apparatus and method for efficient motion estimation

Publication Date: 2025.08.19 TEXAS INSTRUMENTS INC

AI summary

The architecture shown can perform global search, local search and local sub pixel search in a parallel or in a pipelined mode. All operations are in a streaming mode without the requirement of external intermediate data storage.