Parallel Multi-Line Image Processing Blocks Reduce Line Store Modules
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Solution Overview
Problem
Image processing systems require multiple line store modules to facilitate multi-line processing blocks, which consume power and silicon area, and implementing multiple line store modules increases latency and costs.
Innovation Solution
Implementing multiple multi-line processing blocks with parallel processing units that share inputs and outputs, reducing the need for multiple line store modules by allowing processed pixel values from one block to directly serve as inputs for subsequent blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple line store modules are implemented to facilitate multiple multi-line processing blocks, then image processing functionality is improved, but power consumption increases
Solution Approach 1:
Multiple line store modules are merged into a single shared line store module that serves all multi-line processing blocks. The line store module receives pixel values from image sensors and provides them to multiple processing blocks simultaneously, eliminating redundant storage resources and reducing overall power consumption while maintaining full processing functionality.
Solution Approach 2:
The single line store module is designed with multi-functionality to serve multiple multi-line processing blocks. It can provide pixel values to different processing blocks concurrently, making one storage resource perform the function of what would traditionally require multiple separate storage modules, thereby reducing power consumption without sacrificing adaptability.
2Adaptability or versatility
If multiple line store modules are implemented to facilitate multi-line processing blocks, then image processing functionality is improved, but silicon area increases
Solution Approach 1:
Multiple line store modules are merged into a single shared line store module that serves all multi-line processing blocks. This consolidation eliminates redundant storage circuits and reduces the total silicon area occupied by line store functionality, while the module maintains the capability to support multiple processing blocks through its multi-output design.
Solution Approach 2:
The single line store module is designed with multi-functionality to serve multiple multi-line processing blocks simultaneously. By making one storage resource perform the function of what would traditionally require multiple separate storage modules, the silicon area is significantly reduced while preserving full image processing functionality.
3Productivity
If multiple line store modules are implemented, then multi-line processing capability is improved, but latency increases
Solution Approach 1:
Multiple line store modules are merged into a single shared line store module that provides pixel values to multiple processing blocks simultaneously. This eliminates the sequential access latency that would occur if processing blocks had to wait for separate line store modules, as the shared module can serve multiple blocks in parallel, thus reducing overall processing latency while maintaining multi-line processing capability.
4Productivity
If multiple line store modules are implemented, then multi-line processing capability is improved, but system cost increases
Solution Approach 1:
Multiple line store modules are merged into a single shared line store module that serves all multi-line processing blocks. This consolidation reduces the total component count, simplifies the system architecture, and lowers manufacturing costs associated with producing, testing, and assembling multiple identical line store modules, while the shared module maintains the capability to support multiple processing blocks.
Data Source
AI summary
An image processing system is described herein in which a multi-line processing block has multiple inputs and multiple outputs. In order to provide the multiple outputs the multi-line processing block has multiple processing units operating in parallel on the multiple inputs. The multiple outputs of the multi-line processing block are coupled to corresponding multiple inputs of a subsequent multi-line processing block in the image processing system.


