Parallel Multi-Resolution Image Processing for Real-Time MRCoHOG

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Solution Overview

Problem

Existing image recognition technologies face challenges in processing Multi Resolution CoHOG (MRCoHOG) feature amounts in real-time due to the complexity of calculating co-occurrences of luminance gradient directions at different resolutions, which requires high-speed hardware configurations.

Innovation Solution

An image processing device with parallel processing lines for high, medium, and low resolutions, utilizing a circuit configuration that concurrently processes luminance gradients across these resolutions to prepare co-occurrence matrices and output MRCoHOG feature amounts efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If MRCoHOG feature amount extraction algorithm is implemented in hardware, then image recognition robustness is improved, but processing complexity increases

Engineering Contradiction:
Improveimage recognition robustnessVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the image processing into multiple resolution levels (high, medium, low) with separate processing lines for each resolution. This segmentation allows the complex MRCoHOG calculation to be broken down into manageable parallel tasks, reducing overall processing complexity while maintaining recognition robustness through multi-scale analysis

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a resolution dimension to the processing by creating multiple parallel processing lines that operate at different resolutions simultaneously. This dimensional approach transforms the single complex calculation into multiple simpler parallel calculations, making the hardware implementation more feasible

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple resolution images are processed concurrently, then calculation speed is improved, but hardware configuration complexity increases

Engineering Contradiction:
Improvecalculation speedVSAvoidhardware configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the concurrent processing into distinct resolution-specific processing lines (high-resolution line 24a, medium-resolution line 24b, low-resolution line 24c). Each line is independently configured with its own gradient calculation units and processing logic, which simplifies the overall hardware design by avoiding the need for a single complex unified processor

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple resolution processing lines into a unified co-occurrence matrix calculation unit that integrates gradient data from all resolutions. This merging allows efficient utilization of hardware resources while maintaining the speed benefits of concurrent multi-resolution processing

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If co-occurrence matrices are calculated from multiple resolutions, then feature amount robustness is improved, but processing time increases

Engineering Contradiction:
Improvefeature amount robustnessVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary gradient calculations for each resolution level before combining them into co-occurrence matrices. By pre-processing and preparing gradient data at multiple resolutions in advance, the system reduces the time required for final co-occurrence matrix calculation while maintaining robust feature extraction

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3438927B1Image processing device, semiconductor device, image recognition device, mobile device, and image processing method
Publication Date: 2023.09.27 AISIN CORP
  • EP3438927B1 patent drawingFigure 1(a)~1(c)
  • EP3438927B1 patent drawingFigure 2(a)~2(d)
  • EP3438927B1 patent drawingFigure 3(a)~3(d)

AI summary

A hardware configuration is constructed for calculating at high speed the co-occurrence of luminance gradient directions between differing resolutions for a subject image. In an image processing device 21, a processing line for high-resolution images, a processing line for medium-resolution images, and a processing line for low-resolution images are arranged in parallel, and the luminance gradient directions are extracted for each pixel simultaneously in parallel from images having the three resolutions. Co-occurrence matrix preparation units 30a, 30b, and 30c prepare co-occurrence matrices by using the luminance gradient directions extracted from these images having the three resolutions, and a histogram preparation unit 31 outputs a histogram as an MRCoHOG feature amount by using these matrices . To concurrently processing the images having the three resolutions, high-speed processing can be performed, and moving pictures output from a camera can be processed in real time.