Parallel NAND Memory Strings for Lower-Resistance Current Paths

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Solution Overview

Problem

Existing memory arrays, particularly NAND flash memory, face challenges in optimizing the connection and operation of series-connected memory cells to enhance performance and efficiency, especially in terms of current flow and data storage density.

Innovation Solution

The integration of multiple strings of series-connected memory cells that are selectively connected in parallel, allowing for segments of memory cells across multiple decks, with programmable and non-programmable select gates to facilitate parallel current paths and improved conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple strings of series-connected memory cells are connected in parallel, then current flow and data storage density are enhanced, but device complexity increases

Engineering Contradiction:

Improvedata storage densityVSAvoidconnection complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The memory array is divided into multiple decks, with each deck containing segments of series-connected memory cells. These segments are selectively connected in parallel through select gates, allowing independent control and operation of each segment while maintaining overall system functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The select gates are configured to dynamically connect or disconnect segments of memory cells based on operational requirements. This dynamic switching capability allows the system to optimize current flow paths and activate only the necessary memory segments during read/write operations.

Inventive Principle:

Principle #15Dynamics

2Productivity

If select gates are used to selectively connect memory cell segments, then current flow optimization is achieved, but manufacturing complexity increases

Engineering Contradiction:

Improvecurrent flow efficiencyVSAvoidfabrication complexity

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

Multiple select gates are integrated into a unified control structure where gates controlling adjacent segments share common control signals and physical infrastructure. This merging approach reduces the total number of independent control lines and simplifies the manufacturing process while maintaining selective connectivity capabilities.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The select gates are designed with multi-functional capabilities, serving both as connection switches and as part of the control logic structure. This universal design allows the same gate structure to perform multiple functions, reducing overall device complexity and easing manufacturing constraints.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Quantity of substance

If series-connected memory cells are arranged in multiple decks, then data storage capacity increases, but resistance increases

Engineering Contradiction:

Improvedata storage capacityVSAvoidcurrent flow resistance

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The memory structure transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration with multiple decks vertically arranged. This dimensional change allows increased storage capacity without proportionally increasing current path length, as parallel connection paths are established between decks.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Each deck is segmented into multiple independently controllable sections with dedicated select gates. This segmentation enables selective activation of specific segments, allowing current to flow through optimal paths and bypassing high-resistance areas, thereby maintaining reliable current flow despite increased storage capacity.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the efficiency and performance of memory arrays by optimizing current flow and data storage density, reducing resistance, and enabling more efficient data operations.

Implementation Method 1

multiple strings of series-connected memory cells selectively connected in parallel... facilitating parallel current paths and improved conductivity

Methodology Applied

Scientific EffectElectrical Conduction: Conduction (electrical)

Data Source

PatentUS12518827B2Memory arrays having multiple strings of series-connected memory cells selectively connected in parallel, their fabrication, and their operation

Publication Date: 2026.01.06 MICRON TECHNOLOGY INC

AI summary

Arrays of memory cells including a data line, a common source, a conductive element between the data line and the common source, a first string of series-connected memory cells having a first segment of series-connected memory cells selectively connected to the conductive element and a second segment of series-connected memory cells selectively connected to the conductive element and selectively connected to its first segment of series-connected memory cells through the conductive element, and a second string of series-connected memory cells having a first segment of series-connected memory cells selectively connected to the conductive element and a second segment of series-connected memory cells selectively connected to the conductive element and selectively connected to its first segment of series-connected memory cells through the conductive element, as well as apparatus containing such arrays of memory cells and methods of their operation, and methods of their formation.