Parallel Power Amplifier Paths for Low-Power RF Efficiency

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Solution Overview

Problem

Power amplifier circuitry in wireless communication devices is inefficient when reducing output power, leading to increased power consumption and variability in transmission, particularly at lower output power levels due to reduced bias current, which affects battery life and interference minimization.

Innovation Solution

The implementation of parallel power amplifier paths within an integrated circuit, where a first path operates efficiently at higher output powers and a second path, optimized for lower output powers with differential power amplifiers and a reconfigurable matching network, maintains efficiency and reduces process-related variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the bias current of the power amplifier is reduced to lower output power, then interference is minimized, but efficiency falls and variability increases

Engineering Contradiction:

ImproveinterferenceVSAvoidefficiency

Core Design Contradiction:

Object-affected harmful factorsVSLoss of energy

Solution Approach 1:

The transmitter is divided into multiple amplifier paths (first and second paths) with different bias currents. The first amplifier path operates at higher output power with higher efficiency, while the second amplifier path operates at lower output power with optimized efficiency. This segmentation allows the system to maintain efficiency across different power levels by selecting the appropriate path.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system changes the operating parameters (bias current, output power level) by switching between different amplifier paths. The controller selectively enables either the first or second amplifier path based on the desired output power level, thereby optimizing efficiency and minimizing interference appropriately for each operating condition.

Inventive Principle:

Principle #35Parameter changes

2Object-affected harmful factors

If the bias current of the power amplifier is reduced to lower output power, then interference is minimized, but variability in output power increases

Engineering Contradiction:

ImproveinterferenceVSAvoidoutput power consistency

Core Design Contradiction:

Object-affected harmful factorsVSReliability

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If a single amplifier path is used for all power levels, then device complexity is reduced, but efficiency is compromised at lower power levels

Engineering Contradiction:

Improveamplifier structureVSAvoidefficiency at lower power

Core Design Contradiction:

Device complexityVSLoss of energy

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between different amplifier paths based on the desired output power level. The controller selectively enables either the first or second amplifier path, allowing the system to adapt its configuration to optimize efficiency for the current operating condition rather than being fixed at a single configuration.

Inventive Principle:

Principle #15Dynamics

4Loss of energy

If the power amplifier operates at saturation for maximum efficiency, then energy efficiency is improved, but harmful interference increases

Engineering Contradiction:

ImproveefficiencyVSAvoidinterference

Core Design Contradiction:

Loss of energyVSObject-affected harmful factors

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12176853B2Integrated circuit devices with parallel power amplifier output paths

Publication Date: 2024.12.24 TEXAS INSTRUMENTS INC

AI summary

An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.