Parallel Page Buffer Groups for Memory Processing Speed
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Solution Overview
Problem
Current memory devices face inefficiencies in performing simultaneous data processing operations across different memory groups, leading to prolonged processing times and reduced operational efficiency.
Innovation Solution
The implementation of a memory device architecture that divides memory cells into multiple groups, with corresponding page buffer groups performing parallel data processing operations, allowing for simultaneous data processing and counting across these groups, thereby optimizing read retry and program operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cells are divided into multiple groups with separate page buffer groups for parallel processing, then processing speed and operational efficiency are improved, but device complexity increases
Solution Approach 1:
The memory device is divided into multiple independent memory groups (first memory group, second memory group, etc.), each with its own dedicated page buffer group. This segmentation allows parallel data processing operations to occur simultaneously in different memory groups, thereby improving processing speed while managing device complexity through modular organization
Solution Approach 2:
The patent introduces a new dimension of parallelism by organizing memory groups and page buffer groups in a multi-dimensional architecture. Instead of sequential processing within a single memory group, the system operates across multiple groups simultaneously, adding a spatial dimension to the processing architecture that enhances productivity
2Device complexity
If data processing operations are performed sequentially in a single memory group, then device complexity is reduced, but processing time increases
Solution Approach 1:
Multiple memory groups and their corresponding page buffer groups are merged into a unified memory device architecture that operates in coordination. The first page buffer group and second page buffer group perform data processing operations simultaneously on data from their respective memory groups, reducing overall processing time while maintaining manageable device complexity through integrated design
Data Source
AI summary
A memory device is provided as follows. A memory cell array includes a plurality of memory cells, and the plurality of memory cells are divided into a first memory group and a second memory group. A first page buffer group is coupled to the first memory group and includes a plurality of first page buffers. A second page buffer group is coupled to the second memory group and includes a plurality of second page buffers. The first page buffer group performs a first data processing operation on data stored in the first page buffer group and stores a result of the first data processing operation. The second page buffer group performs a second data processing operation on data stored in the second page buffer group and stores a result of the second data processing operation. The first and second data processing operations are performed at substantially the same.