Parallel Path Metric Computing in High-Speed Viterbi Detectors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing path metric computing units in Viterbi detectors face challenges in processing high input data rates, leading to increased circuit complexity and manufacturing costs due to their sequential operation architecture.
Innovation Solution
A parallel operation architecture for path metric computing units is introduced, utilizing comparators, combinational circuits, and multiplexers to generate path metrics based on previous metrics and branch costs, reducing computation time and circuit complexity while maintaining high processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If sequential operation architecture is used for path metric computing units, then circuit complexity is reduced, but computation speed decreases and cannot handle high input data rates
Solution Approach 1:
The path metric computing unit is segmented into multiple parallel computing paths, each handling different input data streams simultaneously. This segmentation enables the system to process high input data rates by distributing the computational load across multiple independent but coordinated units, thereby increasing overall computation speed without proportionally increasing the complexity of each individual unit.
Solution Approach 2:
The invention transitions from a single-dimensional sequential processing architecture to a multi-dimensional parallel processing architecture. By introducing temporal and spatial parallelism dimensions, the system can compute multiple path metrics simultaneously across different time slots and data streams, significantly enhancing computation speed while maintaining manageable circuit complexity through structured organization.
2Productivity
If sequential operation architecture is used, then manufacturing costs are reduced, but processing efficiency for high input data rates deteriorates
Solution Approach 1:
The computing unit is divided into modular segmented blocks that can be independently manufactured and then assembled. This modular segmentation allows for standardized production of identical units, reducing manufacturing costs through economies of scale while enabling parallel operation to achieve high processing efficiency for multiple input data streams.
Solution Approach 2:
The invention uses identical replicated copies of the path metric computing unit operating in parallel. By copying the same proven design multiple times rather than creating a complex monolithic system, manufacturing costs are reduced through standardization and mass production techniques, while processing efficiency is enhanced through the combined capacity of all replicated units handling different data streams simultaneously.
3Loss of time
If parallel operation architecture is implemented, then computation speed increases, but circuit complexity increases
Solution Approach 1:
The parallel architecture is segmented into independent computing modules that operate simultaneously but with simplified individual circuitry. Each module handles a specific portion of the computation, reducing the complexity within each module while the overall system achieves high computation speed through the coordinated parallel operation of these segmented units.
Solution Approach 2:
Multiple simpler computing modules are merged into a unified parallel processing system. Each module maintains relatively simple circuit design, but when combined and operated in parallel, they achieve high computation speed. The merging is orchestrated through standardized interfaces and control logic that manage the parallel operations without creating excessive overall complexity.
Data Source
AI summary
A path metric computing method applied in a high-speed Viterbi detector and related apparatus thereof are disclosed. The path metric computing apparatus includes a comparator for generating a control signal according a plurality of previous path metrics, a combining circuit for generating a plurality of first output values according to the previous path metrics and branch costs of a plurality of branches of a current state, and a multiplexer, electrically connected to the comparator and the combining circuit, for determining a first path metric of the current state according to the control signal and the output values.