Parallel Peak Amplitude Detection for Mismatch-Tolerant PLLs
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Solution Overview
Problem
Phase-locked-loops (PLL) in wireless and wired communication systems face challenges in maintaining stable amplitude of output signals due to variations in manufacturing process corners and device mismatch, leading to inconsistent performance across different integrated circuits (ICs).
Innovation Solution
A peak voltage amplitude detector with multiple amplitude detection circuits coupled in parallel, each generating a voltage indicating the amplitude difference between signal inputs, and an averaging circuit to generate an average voltage, reducing performance variations by activating each circuit sequentially and averaging their outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single amplitude detection circuit is used, then the device complexity is low, but the measurement precision deteriorates due to device mismatch and process variation
Solution Approach 1:
The peak detector is divided into multiple amplitude detection circuits (first, second, third, and fourth circuits) that operate in parallel. Each circuit processes the input signal independently and generates its own peak voltage output. This segmentation allows the system to average out process variations and device mismatch across multiple circuits, thereby improving measurement precision without requiring a single overly complex circuit.
2Use of energy by moving object
If smaller transistors are used to increase AC input amplitude, then the AC input amplitude increases, but the manufacturing precision deteriorates due to increased device mismatch
Solution Approach 1:
Multiple amplitude detection circuits are merged in parallel to form a single peak detector system. Each circuit uses smaller transistors to maintain high AC input amplitude, and their outputs are combined through an averaging operation. This merging approach allows the system to benefit from the high AC input amplitude of smaller transistors while compensating for device mismatch through the collective output of multiple circuits, thereby maintaining both energy efficiency and manufacturing precision.
3Measurement precision
If multiple amplitude detection circuits are used in parallel, then the measurement precision improves, but the device complexity increases
Solution Approach 1:
The peak detector incorporates a feedback mechanism where the outputs of multiple amplitude detection circuits are fed into an averaging circuit. This feedback loop continuously monitors and averages the peak voltages from all parallel circuits, providing a stabilized output that compensates for individual circuit variations. The feedback approach improves measurement precision by systematically handling the complexity of multiple parallel circuits rather than letting it propagate to the final output.
Data Source
AI summary
A peak detector comprises multiple small-size amplitude detection circuits coupled in parallel to signal inputs at which a signal is received from a VCO. Each amplitude detection circuit generates a voltage on an output, indicating a voltage peak or amplitude of a first signal input and a second signal input (specifically, differential output of VCO). At a given time, only one small-size amplitude detection circuit is activated to load VCO, reducing the impact on LC resonant frequency. The plurality of small-size detection circuits work sequentially, and an automatic averaging of their outputs can significantly improve the peak detector fluctuation (caused by process variation and device mismatch) compared to each single small-size amplitude detection circuit.