Parallel Plate Capacitor Resistance Modeling in Integrated Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for modeling resistance in parallel plate capacitor structures in integrated circuits fail to accurately account for the distributed nature of capacitor plates, leading to inconsistencies in lumped element representations.
Innovation Solution
A lumped element model is developed that uses edge nodes and a capacitor node to represent the resistance of the overlap region between parallel plates, with lumped resistances calculated to preserve point-to-point resistance values, ensuring accurate modeling of resistance across the capacitor plate in both x and y directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple lumped element model is used for capacitor resistance, then the model complexity is reduced, but the accuracy of resistance representation deteriorates because it fails to account for the distributed nature of capacitor plates
Solution Approach 1:
The capacitor plate is segmented into multiple regions with different resistance characteristics. The model divides the plate into a first region with first resistance and a second region with second resistance, allowing each segment to be modeled separately rather than using a single lumped resistance value. This segmentation approach captures the distributed nature of resistance while maintaining computational efficiency.
Solution Approach 2:
Different regions of the capacitor plate are assigned different resistance values based on their local characteristics. The first region has a first resistance and the second region has a second resistance, reflecting that resistance properties vary locally across the plate structure. This local quality approach improves accuracy by accounting for spatial variations in resistance without requiring a fully distributed model.
2Ease of manufacture
If contacts are placed only around the perimeter area of the plate, then the interconnect structure is simplified, but the resistance model becomes inaccurate because current distribution through the plate is not properly captured
Solution Approach 1:
The plate is segmented into regions based on their distance from perimeter contacts. Regions closer to contacts have different resistance characteristics than regions farther away. This segmentation allows the model to capture the effect of perimeter-only contacts on current distribution without requiring complex interconnect structures.
Solution Approach 2:
The resistance model incorporates two-dimensional spatial information by dividing the plate into multiple regions with different resistance values. This dimensional approach captures the spatial distribution of current flow from perimeter contacts across the plate surface, improving accuracy while maintaining the simplicity of perimeter-only contacts.
Data Source
AI summary
A parallel plate capacitor structure in an integrated circuit has a first plate and a second plate separated by an insulator, such as a dielectric. Both plates are connected to an interconnect structure at a plurality of connection points. The area of the first plate that overlaps with the second plate is identified. This overlap region does not include any connection points on the first plate. For this overlap region, the lumped element model for the first plate includes nodes on the edge of the overlap region (edge nodes), and lumped resistances between the edge nodes and the node connected to the lumped capacitance. In one embodiment, the lumped element model also includes a common node, all of the edge nodes are connected to the common node by lumped resistances, and the common node is connected by a negative resistance to the lumped capacitance.