Parallel PLL Synthesizer for Fine Resolution and Low Phase Noise
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Solution Overview
Problem
Existing synthesizers face limitations in fine frequency setting resolution due to fractional spurious components and phase noise deterioration when using a single local oscillator for wide-band frequency generation.
Innovation Solution
A parallel-type double loop configuration is implemented, combining a fine-adjustment synthesizer with a fractional PLL and a coarse-adjustment synthesizer using an integer-type PLL, both operating with a low phase noise reference signal source, to suppress fractional spurious components and reduce phase noise without lowering frequency resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a fractional PLL is used for fine frequency adjustment to achieve high frequency resolution, then frequency resolution is improved, but fractional spurious components occur in the vicinity of oscillation frequency
Solution Approach 1:
The frequency synthesis function is segmented into two independent loops: a first loop for coarse frequency adjustment and a second loop for fine frequency adjustment. This segmentation allows each loop to operate optimally for its specific function, with the fine-adjustment loop providing high frequency resolution while the coarse-adjustment loop suppresses fractional spurious components through its integer-type PLL architecture.
Solution Approach 2:
A mixer is introduced as an intermediary component to combine the output signals from the first and second loops. The mixer performs power addition of the two signals, allowing the system to achieve both high frequency resolution from the fine-adjustment loop and low spurious components from the coarse-adjustment loop without direct interaction between the two PLL loops.
2Object-generated harmful factors
If a double feedback loop with series connection is used to suppress spurious components, then spurious component suppression is improved, but phase noise deteriorates due to voltage addition of phase noise from two synthesizers
Solution Approach 1:
The system is segmented into two parallel synthesizer loops rather than a series connection. Each loop independently generates a signal that contributes to the final output through power addition in the mixer, avoiding the phase noise voltage addition that would occur in a series connection where one synthesizer's output serves as the reference for the other.
Solution Approach 2:
The mixer serves as an intermediary that combines the two synthesizer outputs through power addition rather than voltage addition. This approach allows spurious component suppression from both loops while maintaining better phase noise characteristics compared to series connection, as the phase noise from both synthesizers combines in power rather than voltage, resulting in a 3 dB improvement.
Data Source
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AI summary
A fine-adjustment synthesizer (1) includes a fractional phase-locked loop having a reference integer frequency divider (6), a phase comparator (7), a loop filter (8), a frequency variable oscillator (9), a mixer (4), a band-pass filter (13), and a feedback path programmable fractional frequency divider (12). A coarse-adjustment synthesizer (2) includes an integer-type phase-locked loop having a reference integer frequency divider (14), a phase comparator (15), a loop filter (16), a frequency variable oscillator (17), a band-pass filter (19), and a feedback path programmable integer frequency divider (18). An output of a reference signal source (3) is input in parallel to both the fine-adjustment synthesizer (1) and the coarse-adjustment synthesizer (2). An output of the frequency variable oscillator (9) in the fine-adjustment synthesizer (1) and an output of the frequency variable oscillator (17) in the coarse-adjustment synthesizer (2) are guided to the mixer (4) and an output signal of the fine-adjustment synthesizer (1) is guided to an output end (11).