Parallel PN Structures for Semiconductor Trade-offs
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Solution Overview
Problem
Semiconductor devices face a trade-off between ON resistance and breakdown voltage, with existing super-junction structures either increasing ON resistance or degrading the trade-off relation due to current path narrowing and dynamic avalanche breakdown.
Innovation Solution
A semiconductor device with a vertical drift portion and parallel pn structures at different repetition pitches, including a low-resistivity layer and well region, and edge termination structures, which isolates the well region and parallel pn structures to distribute current and reduce electric field concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the thickness of the n-type drift layer is reduced to lower ON resistance, then the ON resistance decreases, but the breakdown voltage is reduced due to insufficient depletion layer extension width
Solution Approach 1:
The drift layer is segmented into multiple parallel pn junctions arranged in a super-junction structure. Each junction creates a depletion region that extends horizontally, and the combined effect of multiple segmented junctions provides both low ON resistance (through multiple current paths) and high breakdown voltage (through extended depletion coverage).
Solution Approach 2:
The invention transitions from vertical depletion layer extension to horizontal depletion layer extension by creating parallel pn junctions. The depletion regions extend in the horizontal direction (parallel to the surface) rather than vertically, allowing the drift layer thickness to be reduced while maintaining breakdown voltage through increased horizontal depletion width.
2Reliability
If the pitch of parallel pn structure is reduced to increase depletion coverage, then the breakdown voltage increases, but the ON resistance increases due to narrowed current paths
Solution Approach 1:
The invention optimizes the local properties of different regions within the super-junction structure. By carefully designing the pitch, width, and impurity concentration of individual pn junctions, each local region contributes to both breakdown voltage (through depletion extension) and ON resistance (through current path availability), achieving overall optimization of the trade-off.
3Reliability
If the parallel pn structure is extended to the edge termination region, then the breakdown voltage increases, but dynamic avalanche breakdown occurs due to current concentration at the edge
Solution Approach 1:
The invention extracts or removes the parallel pn structure from the immediate edge termination region, creating a separation between the super-junction active region and the edge termination structure. This prevents current concentration at the edge while maintaining the breakdown voltage benefits of the parallel pn structure in the active region.
Solution Approach 2:
An intermediate region or transition structure is introduced between the parallel pn structure and the edge termination. This intermediary zone prevents direct current concentration at the edge while allowing the depletion layers to extend sufficiently for high breakdown voltage, thus mediating between the conflicting requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the trade-off relation between ON resistance and breakdown voltage by preventing current concentration and dynamic avalanche breakdown, allowing for higher breakdown voltage without increasing ON resistance.
Implementation Method 1
a portion forming a highly resistive n−-type drift layer has a function of increasing the breakdown voltage by being depleted during the OFF state. When the current path in the n−-type drift layer is shortened, the thickness of the n−-type drift layer is reduced and the width is therefore reduced within which a drain-base depletion layer spreads out from a pn junction
Implementation Method 2
a vertical drift portion disposed between the active portion and the low-resistivity layer, and through which drift current flows in a vertical direction during an ON state
Implementation Method 3
the depletion layer spreads in the horizontal direction (the direction in which the n-type drift regions and the p-type partition regions are alternately arranged repeatedly) from each of the pn junctions each extending in the vertical direction of the parallel pn structure
Data Source
AI summary
A semiconductor device including a substrate, an active portion and a well region both formed in the substrate on a first surface side thereof, and a low-resistivity layer formed in the substrate on a second surface side thereof. A first parallel pn structure is formed in the substrate between the active portion and the low-resistivity layer, the first parallel pn structure having a first region and a second region that are repeatedly alternated at a first repetition pitch. A second parallel pn structure is formed in the substrate between the well region and the low-resistivity layer, the second parallel pn structure having a third region and a fourth region that are repeatedly alternated at a second repetition pitch that is smaller than the first repetition pitch, the well region and the second parallel pn structure being isolated from each other.