Parallel Polyphase Image Interpolation with Reconfigurable Filters
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Solution Overview
Problem
Existing image interpolation apparatuses are not universal and require hardware changes to accommodate images of different characteristics, leading to resource wastage and inefficiency due to the need for multiple interpolation circuits with different filter orders.
Innovation Solution
A parallel polyphase image interpolation apparatus and method that utilizes a local memory for storing image data and filter coefficients, with memory access control units and a state machine to buffer and process image data using reconfigurable filters, allowing for interpolation with any filter order without changing the hardware, enabling efficient scaling of images with different characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple interpolation circuits with different filter orders are included to handle different image characteristics, then the adaptability to different image types is improved, but the hardware resource consumption and device complexity increase
Solution Approach 1:
The patent implements a universal interpolation circuit that can adapt to different image characteristics (natural images, graphics, text, etc.) by dynamically configuring filter parameters. Instead of having separate dedicated circuits for different image types, a single circuit is designed that can be reconfigured through parameter settings to handle various interpolation scenarios, thereby reducing hardware resource consumption while maintaining high adaptability.
Solution Approach 2:
The patent introduces dynamic parameter configuration capability into the interpolation circuit, allowing filter order, tap number, and other parameters to be adjusted in real-time based on image characteristics. This dynamic adaptability enables the same hardware circuit to optimize its performance for different image types without requiring physical reconfiguration or multiple fixed circuits, effectively resolving the contradiction between adaptability and hardware complexity.
2Manufacturing precision
If the filter order is increased to improve detail preservation capability, then the interpolation quality for natural images is improved, but the side effects of overshoot and ringing increase
Solution Approach 1:
The patent employs parameter change strategy by allowing dynamic adjustment of filter order and other parameters based on image characteristics. For natural images requiring high detail preservation, higher filter orders are selected. For graphics and text where overshoot and ringing are problematic, lower filter orders are configured. This parameter-based adaptation enables optimization of detail preservation while controlling harmful side effects without requiring multiple fixed circuits.
Solution Approach 2:
The patent applies different filter parameters (order, tap number, coefficients) to different regions or types of images locally. Instead of using a uniform high-order filter for all images, the system selectively applies appropriate filter configurations based on local image characteristics, thereby achieving high detail preservation where needed while minimizing overshoot and ringing in regions where they are harmful.
3Device complexity
If a fixed single filter is used to simplify the circuit design, then the device complexity is reduced, but the performance for images with different characteristics deteriorates
Solution Approach 1:
The patent transforms a static fixed-filter circuit into a dynamic reconfigurable circuit. The same physical circuit structure can change its behavior by adjusting filter parameters (order, taps, coefficients) based on detected image characteristics. This dynamic capability allows a single simplified circuit design to achieve the performance of multiple specialized filters, resolving the contradiction between circuit simplicity and adaptability.
4Ease of manufacture
If the chip is taped out with fixed filter orders to reduce manufacturing complexity, then the ease of manufacture is improved, but the adaptability to different application needs deteriorates
Solution Approach 1:
The patent incorporates parameter configuration capability into the chip design before taping out, allowing the same manufactured chip to be configured for different filter orders and parameters through software or initialization settings. This preliminary design of reconfigurability enables the chip to be manufactured once with fixed physical structures but configured dynamically for different applications, thereby maintaining ease of manufacture while achieving adaptability.
Data Source
AI summary
The present invention provides apparatus and method for parallel polyphase image interpolation. The apparatus comprises: a local memory, a first memory access control unit, a second memory access control unit, a source image data buffering unit, a filter coefficient buffering unit, a multiply-accumulator, a third memory access control unit and a state machine; the first memory access control unit is configured for obtaining source image data from the local memory and buffering them into a source image data buffering unit; the second memory access control unit is configured for obtaining filter coefficients from the local memory and buffering them into a filter coefficient buffering unit; the source image data buffering unit is configured for inputting source image data to each multiply-accumulator, the filter coefficient buffering unit is configured for broadcasting filter coefficients corresponding to the source image data to the multiply-accumulators; and the multiply-accumulator is configured for performing multiply-accumulation operation on the source image data and the filter coefficients, and outputting the multiply-accumulation result every F clocks. The interpolation apparatus of the present invention is reconfigurable and can support interpolation filters with any order, so it is universal.