Parallel Power Supply Clock Synchronization
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Solution Overview
Problem
Conventional parallel-operating power supply systems face challenges in suppressing cross currents and reducing ripple components due to phase differences in reference clock signals between switching power supplies, making precise timing control difficult.
Innovation Solution
A parallel-operating power supply system where a master switching power supply apparatus synchronizes clock signals with slave apparatuses using transmission circuits with identical delay characteristics, ensuring in-phase clock signals and synchronized switching signals to prevent cross currents and ripple generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If each switching power supply apparatus generates its own reference clock signal independently, then each apparatus can operate autonomously, but the reference clock signals become out of phase causing cross current and ripple components
Solution Approach 1:
The patent merges the clock signal generation function across multiple power supply apparatuses by having one master apparatus generate a reference clock signal that is shared with all slave apparatuses. This unifies the timing reference across the parallel system, ensuring all switching devices operate in phase and eliminating cross current and ripple components while maintaining coordinated autonomous operation.
Solution Approach 2:
The patent introduces a reference clock signal as an intermediary that mediates between the master and slave power supply apparatuses. This clock signal serves as a common timing reference that coordinates the switching operations of all apparatuses, preventing phase differences without requiring direct communication or complex synchronization protocols between the devices.
2Object-generated harmful factors
If a common-mode choke coil is used to suppress cross current, then cross current can be reduced, but the system complexity increases due to additional components
Solution Approach 1:
The patent extracts the cross current suppression function from the power supply circuitry itself by addressing the root cause - the phase difference in clock signals. By synchronizing the clock signals, the harmful cross current is eliminated at its source rather than being suppressed by adding filtering components like common-mode choke coils, thereby reducing system complexity.
Solution Approach 2:
The patent applies preliminary action by synchronizing the clock signals before the power supply apparatuses begin operation. By establishing phase coherence in the timing signals in advance, the system prevents cross current generation at the source, eliminating the need for subsequent corrective measures such as adding common-mode choke coils or other filtering components.
3Manufacturing precision
If precise timing control is implemented to reduce ripple components, then output quality improves, but the control becomes difficult when reference clock signals are out of phase
Solution Approach 1:
The patent creates equipotentiality in the timing domain by providing a common reference clock signal to all power supply apparatuses. This ensures that all switching operations occur at the same phase reference point, making precise timing control achievable without complex phase adjustment mechanisms or difficult synchronization procedures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively suppresses cross currents and reduces ripple components by ensuring in-phase clock and switching signals across multiple power supply apparatuses, enhancing the stability and efficiency of the power supply.
Implementation Method 1
The clock signal provided by one of the plurality of switching power supply apparatuses is supplied to the other switching power supply apparatuses as the clock signal through transmission circuits the master switching power supply apparatus has and transmission circuits the respective slave switching power supply apparatuses have. The input and output transmission circuits have the same delay characteristic.
Data Source
AI summary
Each of master and slave switching power supply apparatuses (2m, 2s) has an IGBT (10m or 10s) switching-controlled by a PWM pulse signal produced, based on a clock signal, by a switching device driving PWM pulse output section (28m or 28s), to thereby provide DC power in parallel to a load (5). The clock signal produced in the master switching power supply apparatus (2m) is coupled to the slave switching power supply apparatus (2s) through a photocoupler (36m) in the master switching power supply apparatus (2m) and a photocoupler (38s) of the slave switching power supply apparatus (2s). Also, the clock signal developed at the output of the photocoupler (36m) is coupled through a photocoupler (38m) to the master switching power supply apparatus (2m). The photocouplers (36m, 38m, 38s) have the same delay characteristic.