Parallel PRBS Testing for Interposer Fault Detection
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Solution Overview
Problem
Existing interposer connection testing methods in 2.5D IC packaging are inefficient as they require sequential testing phases and cannot detect faults in parallel, leading to increased manufacturing time and potential faults in micro bumps due to their small size.
Innovation Solution
The use of parallel pseudo-random bit sequence (PRBS) generators in both the originating and destination IC dies to test all interconnects simultaneously, allowing for concurrent fault monitoring and re-mapping without additional testing phases by comparing test PRBSs with reference PRBSs across multiple conductive traces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sequential connection-by-connection testing is used, then testing thoroughness is improved, but manufacturing time increases
Solution Approach 1:
The testing function is segmented into multiple parallel PRBS generators, each independently testing a subset of interconnects simultaneously. This segmentation allows comprehensive testing coverage while reducing total test time through parallel execution of multiple test channels.
Solution Approach 2:
Multiple test operations that were previously performed sequentially are merged into a single parallel testing phase. The PRBS generators operate concurrently to test multiple interconnects at the same time, combining what were separate testing events into one unified parallel process.
2Area of moving object
If micro bumps are made smaller to reduce die size, then packaging density is improved, but manufacturing fault rate increases
Solution Approach 1:
Fault detection and trace re-mapping are performed during the manufacturing process before final product deployment. This preliminary action identifies and compensates for manufacturing defects in small micro bumps early, preventing faulty connections from reaching the customer and allowing smaller, more dense micro bumps to be used confidently.
Solution Approach 2:
The system changes the operational parameters of the interconnects by dynamically re-mapping signal routes around detected faulty traces. This parameter change allows the system to maintain reliable operation even when some micro bumps have manufacturing defects, effectively compensating for the increased fault rate associated with smaller micro bump sizes.
3Reliability
If redundant traces are added to compensate for faults, then reliability is improved, but device complexity increases
Solution Approach 1:
The system performs self-diagnosis and self-reconfiguration by automatically detecting faulty traces and re-mapping interconnects without external intervention. This self-service capability manages the complexity of redundant trace routing through automated control, reducing the burden on external testing and programming equipment.
Solution Approach 2:
The parallel PRBS testing provides real-time feedback on interconnect functionality, which is used to dynamically control the re-mapping process. This feedback mechanism enables the system to adaptively route signals around faulty traces, managing the complexity of redundant pathways through intelligent control based on actual test results.
Data Source
AI summary
Accordingly, an improved interposer connection testing technique is provided, employing parallel pseudo-random bit sequence (PRBS) generators to test all the interconnects in parallel and simultaneously detect any correctable defects. In one embodiment, a microelectronic assembly includes an interposer electrically connected in a flip-chip configuration to an originating IC (integrated circuit) die and to a destination IC die, the substrate having multiple conductive traces for a parallel communications bus between the IC dies. The originating IC die has a first parallel PRBS (pseudo-random binary sequence) generator to drive test PRBSs with different phases in parallel across the interposer traces. The destination IC die has a second parallel PRBS generator to create reference PRBSs with different phases, and a bitwise comparator coupled to receive the test PRBSs from the interposer traces and to compare them to the reference PRBSs to provide concurrent fault monitoring for each of the traces.