Parallel Analog Predistortion Linearizer With Gain-Stabilized AM/PM Control
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Solution Overview
Problem
Existing analog predistortion linearizers are costly, occupy large substrate area, and face challenges in achieving a constant degree of compensation for AM/AM and AM/PM distortions, particularly due to the complexity of varactor-controlled phase predistorters and the need for delay equalization in mixer-based designs.
Innovation Solution
A parallel phase and amplitude predistortion linearizer using two FETs subpolarized near pinch-off for gain expansion, with feedback biasing to set constant drain currents, coupled through a 90° phase shifter and analog adder for simultaneous amplitude and phase predistortion, eliminating the need for varactors and delay lines, thus simplifying the design and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If varactor-controlled phase predistorters are used, then phase predistortion can be achieved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the phase predistortion function from the complex varactor-controlled architecture and implements it separately using a dedicated phase shifter stage. This separates the phase control function from the amplitude control, eliminating the need for complex varactor control circuits while maintaining predistortion accuracy.
Solution Approach 2:
The predistortion linearizer is segmented into distinct functional stages: an amplitude predistortion stage using gain expanders and a separate phase predistortion stage using a phase shifter. This segmentation allows each stage to be optimized independently, reducing overall system complexity while maintaining performance.
2Manufacturing precision
If mixer-based designs with delay equalization are used, then AM/PM distortion compensation can be achieved, but substrate area increases
Solution Approach 1:
The patent removes the delay equalization requirement by extracting the phase predistortion function into a separate stage that naturally provides the necessary phase adjustment without requiring additional delay lines or equalization circuits, thereby reducing substrate area.
Solution Approach 2:
The patent transitions from a single-stage predistortion approach to a two-stage architecture operating in different functional dimensions (amplitude and phase), allowing phase compensation to be achieved through spatial separation of functions rather than temporal delay equalization, reducing the need for large substrate areas.
3Manufacturing precision
If parallel phase and amplitude predistortion stages are used, then linearization performance improves, but device complexity increases
Solution Approach 1:
The parallel predistortion architecture is segmented into modular stages with clear functional separation: amplitude predistortion using gain expanders and phase predistortion using a phase shifter. Each module is independently controlled and optimized, making the complex system manageable and maintainable.
Solution Approach 2:
The patent implements feedback control in each predistortion stage, with the amplitude predistortion stage receiving feedback from the input signal envelope and the phase predistortion stage receiving feedback from the same envelope detection circuit. This coordinated feedback mechanism ensures both stages work together to achieve optimal linearization performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves efficient gain stabilization and linearization with reduced substrate area occupancy, maintaining the advantages of gain stabilization and no-tuning linearization, while providing significant cost savings and increased bandwidth.
Implementation Method 1
two FETs subpolarized near pinch-off for gain expansion
Implementation Method 2
with feedback biasing to set constant drain currents
Implementation Method 3
coupled through a 90° phase shifter
Data Source
Figure 1~2
Figure 3
Figure 4~5
AI summary
An analog predistortion linearizer is connected upstream to a power amplifier subject to AM/AM and AM/PM distortions at high power levels of the input signal. The linearizer includes: a) a first FET (73) subpolarized near pinch-off for amplifying the input signal with variable gain, obtaining a first amplitude predistorted signal for compensating AM/AM distortions; b) a first differential integrator for changing in feedback the gate voltage of the first FET in order to set a constant average drain current in correspondence of which a first predetermined power level of the in-band intermodulation products is generated; c) a second FET (72) subpolarized near pinch-off for amplifying a lambda quarter delayed input signal with variable gain, obtaining a second amplitude predistorted signal for compensating AM/PM distortions; d) a second differential integrator for changing in feedback the gate voltage of the second FET in order to set a constant average drain current in correspondence of which a second predetermined power level of the in-band intermodulation products is generated; e) a resistive attenuator (78) at the input of a linear power amplifier (74) of the input signal; f) a three-input analog adder (75) which sums up the AM/PM and AM/PM predistoted signals and the linearly amplified one, obtaining the desired amplitude and phase predistortion signal insensible to the initial setting of the drain current.