Parallel Processing Apparatus Local Memory Circuit Reconfiguration

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Solution Overview

Problem

Existing reconfigurable circuits face inefficiencies due to the time required for configuring and reconfiguring, large storage capacity needs for configuration data, and downtime during reconfiguration, which hampers parallel processing efficiency.

Innovation Solution

A parallel processing apparatus with local memories for each computing element and selector, allowing for autonomous switching of operations and connections based on data stored in these memories, reducing the need for large configuration memory and enabling faster reconfiguration without downtime.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If configuration data is stored in a centralized configuration memory for the whole circuit, then the circuit can be reconfigured dynamically, but the storage capacity requirement becomes extremely large

Engineering Contradiction:
Improvecircuit reconfiguration capabilityVSAvoidstorage capacity
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent divides the centralized configuration memory into multiple local configuration memories, each associated with specific computing elements or network components. This segmentation reduces the storage capacity requirement for each individual memory unit while maintaining overall reconfiguration capability through distributed storage architecture.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the whole circuit configuration is loaded from configuration memory, then the circuit can be reconfigured, but the reconfiguration time increases

Engineering Contradiction:
Improvecircuit reconfigurationVSAvoidreconfiguration time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The configuration data is divided into segments stored in distributed local configuration memories. During reconfiguration, only the necessary segments need to be accessed and updated, rather than loading the entire circuit configuration, thereby reducing reconfiguration time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Configuration data is pre-loaded into local configuration memories during idle periods or between processing tasks. This preliminary action ensures that when reconfiguration is needed, the data is already available in fast-access local memory, minimizing reconfiguration time.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If the circuit is reconfigured during operation, then adaptability is improved, but processing downtime occurs during reconfiguration

Engineering Contradiction:
Improvedynamic circuit reconfigurationVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system performs configuration updates in advance during idle periods or between processing tasks. Local configuration memories are updated with new configuration data before it is needed, allowing the circuit to switch to new configurations without processing downtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The distributed local configuration memory architecture enables continuous processing by allowing configuration updates to occur in parallel with data processing operations. Different parts of the circuit can be reconfigured at different times without halting overall system operation.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7512873B2Parallel processing apparatus dynamically switching over circuit configuration
Publication Date: 2009.03.31 MONTEREY RESEARCH LLC
  • US7512873B2 patent drawing
  • US7512873B2 patent drawing
  • US7512873B2 patent drawing

AI summary

A parallel processing apparatus dynamically switching over a circuit configuration includes a plurality of computing elements, a network establishing connections between the plural computing elements, a plurality of selectors provided corresponding to the plurality of computing elements within the network and controlling outputs from the computing elements, first local memories stored with data used for the operations by the computing elements and connected to the respective computing elements, and second local memories stored with data used for controlling the connections by the selectors and connected to the respective selectors.