Parallel Program Validation via Control Flow Graph Comparison
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Solution Overview
Problem
Existing parallelization tools may introduce errors into parallel programs, leading to semantic inequivalence with their sequential counterparts, potentially causing data race conditions and deadlocks, which can result in malfunctioning parallel programs when deployed on multi-processor systems.
Innovation Solution
A computer system and method that validates the correctness of parallel programs by comparing control flow graphs and dependencies with their sequential counterparts, ensuring semantic equivalence through static analysis and checking for data race conditions and deadlocks before deployment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallelization tools are used to derive parallel programs from sequential programs, then execution speed and productivity are improved through parallel processing, but errors may be introduced leading to semantic inequivalence between the parallel and sequential programs
Solution Approach 1:
The patent performs validation of the parallel program before deployment by comparing its control flow graph and dependencies with the original sequential program. This preliminary check detects potential errors such as data race conditions and deadlocks before the parallel program is executed, ensuring semantic equivalence is maintained while allowing parallel execution benefits to be realized.
2Productivity
If data exchange between processing units is enabled to allow different processors to work on different sections, then parallel processing capability is improved, but data race conditions and deadlocks may occur due to unsynchronized access
Solution Approach 1:
The patent implements a feedback mechanism where the control flow graph and dependency information of the parallel program are compared against the original sequential program. This feedback loop identifies data race conditions and deadlocks by detecting mismatches in data access patterns and synchronization requirements, allowing corrections to be made before deployment.
Solution Approach 2:
The patent uses control flow graphs and dependency analysis as intermediary representations to mediate between the parallel and sequential program versions. By analyzing these intermediate structures, the system can detect synchronization issues without directly executing the parallel program, serving as a safety layer between the parallelization process and actual execution.
Data Source
AI summary
Validation of correct derivation of a parallel program from a sequential program for deployment of the parallel program to a plurality of processing units is described. The system receives the program code of the sequential program and the program code of the parallel program. A static analysis component computes a first control flow graph, and determines dependencies within the sequential program code. It further computes a further control flow graph for each thread or process of the parallel program and determines dependencies within the further control flow graphs. A checking component checks if the sequential program and the derived parallel program are semantically equivalent by comparing the respective first and further control flow graphs and respective dependencies. A release component declares a correct derivation state for the parallel program to qualify the parallel program for deployment if the derived parallel program and the sequential program are semantically equivalent.