Parallel Radix Sorting With Conflict-Free Memory Copy Scheduling

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Solution Overview

Problem

Conventional parallel radix sorting algorithms face copying conflicts that serialize the process, leading to delayed completion when multiple data elements attempt to copy to the same target memory, negating parallel operation and increasing the worst-case time required to sort large datasets.

Innovation Solution

A conflict-free parallel radix sorting algorithm that schedules data element copies to ensure each target memory receives only one copy per cycle, using a conflict-free scheduling algorithm to eliminate memory copying conflicts and maintain maximum throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If parallel copying of data elements is performed from source memories to target memories, then sorting speed is improved, but memory copying conflicts occur causing serialization

Engineering Contradiction:
Improvesorting speedVSAvoidcopying conflict avoidance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by computing prefix sums of data element counts for each key value before the copying phase. This pre-computed information is stored in a lookup table that guides the copying process, ensuring that each processing element knows its destination range in advance, thereby preventing copying conflicts before they occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism in the form of a lookup table that mediates between the parallel copying operations and the target memory addresses. This lookup table acts as a coordinator that translates parallel copy requests into conflict-free destination assignments, eliminating direct conflicts between multiple processors writing to the same target location.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple data elements are copied to the same target memory simultaneously, then parallel throughput is increased, but copying conflicts arise leading to serialization

Engineering Contradiction:
Improveparallel throughputVSAvoidtime lost to serialization
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary computation of prefix sums and destination address mappings before the parallel copying phase. By pre-determining the exact destination range for each processing element's data elements, the system maintains high parallel throughput without conflicts, as each processor independently writes to its assigned range without interfering with others.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter of destination address assignment from static fixed addresses to dynamic ranges determined by prefix sums. This parameter transformation allows multiple processors to write simultaneously to different ranges within the same target memory, maintaining parallel throughput while eliminating conflicts through parameter-based address space partitioning.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a simple parallel sorting algorithm is used, then implementation complexity is reduced, but copying conflicts cause performance degradation

Engineering Contradiction:
Improvealgorithm complexityVSAvoidsorting speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent adds a preliminary prefix sum computation phase that, while increasing algorithmic steps, uses simple arithmetic operations that can be performed in parallel. This preliminary action establishes conflict-free destination mappings that enable the subsequent copying phase to proceed at maximum parallel speed, thus resolving the speed-complexity tradeoff.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical conflict-resolution mechanism (serialization when conflicts occur) with a computational pre-planning mechanism (prefix sum-based destination calculation). This substitution eliminates the need for conflict detection and resolution during the copying phase, maintaining high speed while accepting moderate algorithmic complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12632183B2Conflict-free parallel radix sorting device, system and method
Publication Date: 2026.05.19 ACHRONIX SEMICONDUCTOR CORP
  • US12632183B2 patent drawing
  • US12632183B2 patent drawing
  • US12632183B2 patent drawing

AI summary

A conflict-free parallel radix sorting algorithm, and devices and systems implementing this algorithm, schedules memory copies of data elements of a large dataset so that there is always a single copy to each target memory each cycle of operation for the system implementing the algorithm. The conflict-free parallel radix sorting algorithm eliminates memory copying conflicts in copying data elements from different source memories to the same target memory and in this way maintains maximum throughput for the copying of data elements from source memories to target memories, reducing the time required to sort the data elements of the large dataset.