Parallel Rate Matching Device for WCDMA Processing Speed
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Solution Overview
Problem
Current rate matching and de-rate matching processing in WCDMA communication systems are limited by the sequential computation of parameter e, which restricts processing speed, especially with the advent of faster data transfer technologies like eHSPA and LTE.
Innovation Solution
The implementation of a rate matching and de-rate matching device that determines the output number of each bit based on initial and incremental parameters, allowing parallel processing of input data without dependence on previous bit processing results, thereby accelerating the processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sequential computation of parameter e is used for rate matching processing, then processing can be performed according to the standard algorithm, but processing speed is limited and cannot keep up with faster data transfer technologies
Solution Approach 1:
The patent divides the rate matching processing into independent units for each bit, allowing parallel computation. Each bit's parameter e can be computed independently using the same formula, eliminating the sequential dependency and enabling simultaneous processing of multiple bits.
Solution Approach 2:
The patent transitions from time-based sequential processing to space-based parallel processing. By computing parameter e for all bits simultaneously across different spatial positions (bits), the system achieves faster processing speed without increasing time complexity.
2Productivity
If parameter e is computed based on the previous bit's parameter, then the standard rate matching algorithm can be implemented, but parallel processing becomes difficult and processing speed increases slowly
Solution Approach 1:
The patent segments the computation into independent bit-level operations. By expressing parameter e as a function of bit index m and initial value eini rather than depending on previous bit results, each bit can be processed independently in parallel without increasing system complexity.
Solution Approach 2:
The patent changes the parameter dependency model from sequential (e[m] depends on e[m-1]) to index-based (e[m] depends on m and eini). This parameter transformation enables parallel computation while maintaining the same algorithmic logic, avoiding the need for complex synchronization mechanisms.
3Reliability
If sequential bit processing is used, then correct rate matching can be achieved, but the processing time increases dramatically with data length
Solution Approach 1:
The patent segments the rate matching process into independent bit operations that can execute simultaneously. Each bit's processing is divided into calculating parameter e and determining output based on e, allowing all bits to be processed in parallel while maintaining correctness through deterministic calculations.
Solution Approach 2:
The patent performs preliminary calculation of parameter e for all bits before the actual rate matching operation. By pre-computing e values based on bit indices and initial parameters, the system eliminates sequential processing time and achieves constant time complexity regardless of data length.
Data Source
AI summary
A rate matching method and device wherein the number of times to output each bit included in input data is determined in parallel, and the data length of the input data is expanded or contracted, based on basic parameters for expanding or contracting the input data and the bit number (m) of each bit of the input data. A de-rate matching method and device is also disclosed wherein expanded or contracted data is decoded to pre-expanded/contracted data.