Parallel Recursive Neural Network for Efficient Sequence Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Recurrent neural networks (RNNs) face challenges in training to high accuracy on long sequences with long-range dependencies and are computationally expensive, making them difficult to implement efficiently on resource-constrained parallel processing architectures like GPUs.
Innovation Solution
A parallel recursive neural network (PRNN) architecture that applies a recursive layer function and reduction function in parallel across pairs of adjacent hidden states using convolutional operations, reducing the sequence length efficiently and leveraging parallel computing hardware for faster training and inference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional recurrent neural networks are used to process long sequences, then the model can capture long-range dependencies, but the computational cost becomes prohibitively high and training convergence is difficult
Solution Approach 1:
The patent segments the long sequence processing into multiple parallel branches, where each branch processes a portion of the sequence independently. This segmentation reduces the computational depth of backpropagation while maintaining the ability to capture long-range dependencies through the parallel structure.
Solution Approach 2:
The patent transforms the sequential processing architecture into a parallel architecture by introducing a new dimensional structure. Instead of processing sequences sequentially through time steps, the model processes multiple sequence segments simultaneously, changing the computational dimension from sequential to parallel.
2Productivity
If recurrent neural networks are implemented on parallel processing architectures like GPUs, then processing speed can be improved, but the sequential nature of RNNs limits efficient parallelization
Solution Approach 1:
The patent divides the sequence processing task into multiple independent segments that can be processed in parallel. Each segment is handled by a separate computational branch, enabling efficient utilization of parallel processing hardware like GPUs while maintaining the sequential processing benefits within each segment.
Solution Approach 2:
The patent merges multiple parallel processing branches into a unified output structure. The results from parallel segment processing are combined through concatenation or aggregation operations, achieving both parallel processing speed and unified sequence understanding.
3Length of stationary object
If the sequence length is increased to handle more data points, then the model coverage improves, but the backpropagation depth increases linearly making training harder
Solution Approach 1:
The patent segments long sequences into multiple shorter sub-sequences processed in parallel. This segmentation maintains the ability to handle long-range data while reducing the backpropagation depth within each segment, as the gradient computation only needs to traverse the shorter segment length rather than the full sequence length.
Solution Approach 2:
The patent changes the computational structure from a single deep sequential path to multiple shallow parallel paths. By processing sequence segments in parallel dimensions rather than a single sequential dimension, the effective backpropagation depth is reduced while maintaining coverage of the entire sequence.
Data Source
AI summary
A parallel recursive neural network, including: a memory configured to store data and processing instructions; and a parallel computer processor configured to: receive a set of input values; apply a recursive layer function individually on each of the set of input values in parallel to produce a set of hidden states; apply a reduction function on pairs of adjacent hidden states in the set of hidden states in parallel to produce a new set of hidden states; and repeat applying the reduction function of pairs of adjacent states in the new set of hidden states in parallel until a single output hidden state results.


