Parallel RF DAC Architecture for High Current Output
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Solution Overview
Problem
Conventional digital-to-analog converters (DACs) in radio frequency (RF) transmitters face challenges in providing high output power efficiently, with low drain efficiency and limited current output, which complicates the design and increases costs, especially when used with digital pre-distortion systems.
Innovation Solution
A high output power digital-to-analog converter system utilizing a parallel DAC structure with 8 parallel DAC cores and a cascode stage, combining complementary metal-oxide semiconductor (CMOS) and Gallium Arsenide (GaAs) technologies to achieve high current and voltage outputs, thereby simplifying the design and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a single DAC is used to output high current, then the current output capability is improved, but the design complexity and reliability deteriorate
Solution Approach 1:
The patent divides a single high-current DAC into multiple parallel DACs, each handling a portion of the total current. This segmentation allows each individual DAC to operate within its optimal design parameters while collectively achieving high current output, thereby maintaining design simplicity and improving reliability through modular architecture.
2Power
If a single DAC is used to output high current, then the current output capability is improved, but the system reliability deteriorates
Solution Approach 1:
By segmenting the high-current output function across multiple parallel DACs, the system achieves redundancy and fault tolerance. If one DAC fails, the others can continue operating, thereby improving overall system reliability while maintaining the required current output capability through the parallel combination.
3Device complexity
If conventional DAC design is used in RF transmitters, then the design is simpler, but the drain efficiency deteriorates
Solution Approach 1:
The patent changes the operational parameters of the DAC system by using multiple parallel DACs operating at optimized current levels rather than a single DAC operating at high current. This parameter change improves drain efficiency by keeping individual DACs within their optimal efficiency range while collectively providing the required high current output.
4Ease of manufacture
If conventional DAC design is used, then the design costs are lower, but the current output capability deteriorates
Solution Approach 1:
The patent combines multiple standard DAC units in parallel to achieve high current output capability. This merging approach allows the use of proven, cost-effective DAC designs while achieving the required high current performance through parallel combination, avoiding the need for expensive custom high-current DAC development.
Data Source
AI summary
The present disclosure discloses a digital-to-analog converter (DAC) design which is suitable for providing a high output power high-speed DAC, e.g., in radio frequency applications. The DAC design utilizes a parallel DAC structure, e.g., having 8 parallel DACs and an aggregate current output, to provide a high and programmable current output (in some implementations, up to 512 mA or more). The parallel DAC structure alleviates the design problems which exist in trying to output a high amount of current using a single DAC. The DAC design further utilizes a hybrid structure which integrates the signal chain for a more reliable system. In some embodiments, the hybrid structure uses a CMOS process for the current sources and switches and a GaAs cascode stage for combining the outputs to optimally leverage the advantages of both technologies. The result is a highly efficient DAC (with peak output power programmable up to 29 dBm or more).