Parallel RFID Signal Processing Branches for Multi-Modulation Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current RFID systems lack the ability to efficiently and quickly process signals from passive RFID chips with different modulation types, coding, signal lengths, and shapes, leading to confusion and inefficiency in signal processing.

Innovation Solution

A device with parallel branches and modules that include filters and bit decoders adapted for different types of signal modulation, along with a computing unit capable of processing signals with pre-defined protocols, allowing for fast and effective processing of signals from RFID chips with various properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple readers are used to handle different signal combinations, then versatility is improved, but device complexity and confusion increase

Engineering Contradiction:
ImproveversatilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The signal processing system is divided into multiple independent parallel branches, each dedicated to processing a specific modulation type (ASK, FSK, PSK). Each branch contains its own filter and bit decoder configured for that specific modulation, allowing simultaneous processing of different signal types without interference between branches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A single reader device is designed to handle multiple modulation types through its multi-branch architecture. The reader can process ASK, FSK, and PSK signals simultaneously using different branches, making one device capable of replacing multiple specialized readers while reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If serial connection of filters is used, then signal processing is simplified, but processing efficiency decreases

Engineering Contradiction:
Improveprocessing simplicityVSAvoidprocessing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

Instead of connecting filters in series, the patent implements parallel branches where each branch contains its own filter and bit decoder. This segmentation allows independent simultaneous processing of different modulation types, dramatically improving processing efficiency while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables fast and accurate processing of signals from RFID chips with different protocols, reducing computation demands and improving data accuracy by using parallel connections and a timer unit to check bitrate compatibility.

Implementation Method 1

It emits to its immediate surroundings electromagnetic radiation with the frequency ranging exactly in the radio frequency

Methodology Applied
Scientific EffectElectromagnetic radiation: Electromagnetic Induction

Implementation Method 2

the passive RFID chip uses this radiation energy, which powers its internal circuit

Methodology Applied
Scientific EffectElectromagnetic energy conversion: Electromagnetic Induction

Data Source

PatentUS11934908B2Device for detection of a signal of passive chips and method for operating the device
Publication Date: 2024.03.19 Y SOFT CORP AS
  • US11934908B2 patent drawing
  • US11934908B2 patent drawing
  • US11934908B2 patent drawing

AI summary

A device for detection of a signal of passive RFID chips comprises an antenna for transmitting a source radio signal and receiving a RFID chip radio signal. A signal processed by a peak detector is fed to an input of first and second parallel branches. An output of these branches is connected to a computing unit. The first and second branches each comprise a filter and a bit decoder. The filter and bit decoder of the first and second branches each processes a signal modulated by first and second types of modulation. The computing unit comprises at least first and second modules connected in parallel comprising a protocol for detection of a signal processed by the protocol, wherein the first and second module protocols are different.