Parallel Round Robin Arbitration for Packet Switch Delay Reduction
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Solution Overview
Problem
The existing round robin arbitration methods in packet switches introduce delays due to the need for candidate rotation and evaluation of selection criteria, which affect the performance of the switch by increasing the time required for the arbiter to select data for routing.
Innovation Solution
The method involves performing multiple parallel round robin arbitration options assuming different previous winners and identifying the actual previous winner among these options, eliminating the need for candidate rotation and allowing simultaneous processing within priority groups to reduce delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional round robin arbitration with candidate rotation is used, then fair access is ensured among input ports, but arbitration delay increases due to rotation time
Solution Approach 1:
The patent pre-calculates and stores round robin arbitration results for all possible previous winners before the actual arbitration occurs. When arbitration is needed, the system only needs to select from pre-computed results based on the actual previous winner, eliminating the need for time-consuming rotation operations during real-time arbitration.
Solution Approach 2:
The patent creates multiple copies of the round robin arbitration logic, each assuming a different input port as the previous winner. These parallel copies process simultaneously and produce multiple potential results, which are then merged based on the actual previous winner. This copying approach eliminates sequential rotation delays while maintaining fair access.
2Device complexity
If sequential round robin arbitration is performed, then simple implementation is maintained, but processing time increases
Solution Approach 1:
The patent segments the round robin arbitration process into multiple independent parallel threads, each handling a specific assumption about the previous winner. These segments operate simultaneously rather than sequentially, dramatically increasing processing speed while the final result is determined by a simple selection mechanism based on the actual previous winner.
Solution Approach 2:
The patent transitions from a single-dimensional sequential arbitration process to a multi-dimensional parallel process. Instead of processing arbitration steps one after another in time, the system executes multiple arbitration scenarios simultaneously across parallel hardware paths, effectively adding a spatial dimension to the processing architecture.
Data Source
AI summary
A switch includes an arbiter that receives a plurality of requests from N input ports, and determines N round robin arbitration option winners by performing N round robin arbitration options on the requests, each of the N round robin arbitration options performed assuming that a different one of the N input ports was a previous round robin arbitration winner. After the actual previous round robin arbitration winner is identified, a current round robin arbitration winner from among the N round robin arbitration option winners is determined by selecting the round robin arbitration option winner in which the assumed previous round robin arbitration winner is the actual previous round robin arbitration winner.