Parallel Sample-and-Hold Circuit for Interleaved Low-Noise Sampling
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Solution Overview
Problem
Conventional sample-and-hold circuits with two follower-blocker modules connected in series suffer from switching errors, limited control over sampling moments, and increased noise due to accumulated noise from master-slave operation, degrading linearity and efficiency.
Innovation Solution
A sample-and-hold device with two follower-blocker modules connected in parallel, allowing independent control over sampling moments, reducing noise, and achieving improved linearity by operating in time interleaving with clock signals in phase opposition, and utilizing an offset current to correct duty cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If two follower-blocker modules are connected in series to double the sampling frequency, then the sampling rate is improved, but switching errors and noise increase, degrading linearity
Solution Approach 1:
The patent divides the sampling system into two independent parallel channels (first and second follower-blocker modules) instead of connecting them in series. Each channel operates independently with its own sampling clock, allowing the output to be a combination of both channels rather than a sequential master-slave operation. This segmentation eliminates the switching errors between stages while maintaining doubled sampling frequency through time-interleaved operation.
2Productivity
If two follower-blocker modules are connected in series, then the sampling frequency is doubled, but the noise figure increases due to cumulative noise from master-slave operation
Solution Approach 1:
The patent segments the signal path into two independent parallel channels that process signals simultaneously rather than sequentially. By operating in parallel with time-interleaved sampling clocks, each channel contributes equally to the output without one channel being blocked by the other, thereby avoiding the cumulative noise effect of master-slave operation while achieving doubled sampling frequency.
3Productivity
If two follower-blocker modules are connected in series, then the sampling frequency is doubled, but the sampling time between modules is linked and not controllable
Solution Approach 1:
The patent segments the control mechanism by providing independent sampling clocks for each follower-blocker module. This allows the sampling moments of the first and second channels to be independently controlled and adjusted, providing flexibility in timing while maintaining the doubled sampling frequency through parallel time-interleaved operation.
Data Source
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AI summary
The invention relates to an electrical signal sample-and-hold device comprising an input module (12) having two inputs, comprising a first switching block (14) comprising two input switches (16,18), each input of the module input module (12) being connected to the input of one of said input switches (16, 18), the input module (12) being connected to the input of a first follower-blocker module (20) with two inputs and two outputs, so as to alternately route the signal from one of the two inputs to one of the inputs of the first follower-blocker module (20). This device comprises a second follower-blocker module (22) connected in parallel with the first follower-blocker module (20), these sampler-blocker modules being connected at the output of the first switching block (14), and an output module ( 26) comprising a second switching block (28) comprising two output switches (30, 32), the outputs of the first and second follower-blocker modules (20, 22) being connected to the inputs of the output switches (30, 32) , so as to achieve a temporal interleaving of the output signals of the follower-blocker modules.