Parallel Semiconductor Chip Arrangement for Uniform Current Distribution
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Solution Overview
Problem
In semiconductor devices with multiple chips connected in parallel, varying on-resistances lead to uneven current distribution, risking damage to chips with lower rated current values due to excessive current flow.
Innovation Solution
The semiconductor device and manufacturing method involve arranging chips and wiring conductors in a parallel circuit configuration where the on-resistances of chips and conductors are strategically aligned to ensure uniform current flow, using different resistance values for wiring conductors to manage on-resistance variations across the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple semiconductor chips are connected in parallel to allow large current flow, then the total current capacity increases, but current distribution becomes uneven due to on-resistance variations causing some chips to exceed their rated current
Solution Approach 1:
The patent applies local quality by assigning different on-resistance values to different chips in the parallel connection. Specifically, chips are selected and arranged such that those with smaller on-resistance are positioned closer to the power supply terminal, while chips with larger on-resistance are positioned farther away. This non-uniform local property distribution compensates for the inherent resistance variations, ensuring more uniform current distribution across all chips and preventing any single chip from exceeding its rated current capacity.
2Device complexity
If chips with varying on-resistances are connected in parallel, then device complexity is reduced by using standard chips, but current uniformity deteriorates leading to potential chip failure
Solution Approach 1:
The patent implements preliminary action by pre-selecting and pre-arranging chips with specific on-resistance values before connecting them in parallel. During the assembly stage, chips are measured or characterized for their on-resistance, and then deliberately positioned in predetermined locations within the parallel circuit based on these measurements. This preliminary arrangement ensures that when power is applied, the current automatically distributes uniformly across all chips without requiring additional control circuitry or complex balancing mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent current distribution across all chips, reducing the risk of chip damage from excessive current and enhancing the reliability of the semiconductor device by maintaining uniform resistance from input to output.
Implementation Method 1
the first and second wiring conductors have respective resistances different from each other. When the wiring conductor on the current supply side for the plurality of first semiconductor chips in the first and second wiring conductors has a resistance greater than that of the other wiring conductor
Data Source
AI summary
To provide a semiconductor device which allows a plurality of semiconductor chips to let a current flow uniformly therethrough and a method of manufacturing the same. The semiconductor device in accordance with one embodiment comprises a plurality of first semiconductor chips and a circuit board, mounted with the plurality of the first semiconductor chips, having first and second wiring conductors electrically connected to the plurality of first semiconductor chips. The plurality of first semiconductor chips are connected in parallel together with the first and second wiring conductors so as to construct a first parallel circuit. The plurality of first semiconductor chips are arranged on the circuit board according to an on-resistance of the plurality of first semiconductor chips so that a uniform current flows through the plurality of first semiconductor chips.