Parallel Semiconductor Switching Array with Asymmetric Power Dissipation

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Solution Overview

Problem

Existing power modules compromise between conduction losses and switching losses, as they are optimized with a single type of semiconductor component, limiting the ability to independently manage different power loss characteristics.

Innovation Solution

A circuit arrangement featuring at least two semiconductor elements of the same type connected in parallel, each with distinct power loss characteristics, allowing for differential operation along their characteristic curves to optimize conduction and switching losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If parallel semiconductor devices are made identical in type and characteristics, then current distribution is symmetric and simple control is achieved, but flexibility in optimizing different power loss characteristics is lost

Engineering Contradiction:
Improvecurrent distribution symmetryVSAvoidpower loss optimization flexibility
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by making the first and second semiconductor components differ in their characteristics while maintaining parallel connection. The first component has characteristics optimized for conduction losses and the second component has characteristics optimized for switching losses. This allows asymmetric optimization of power loss characteristics while still achieving controlled current distribution through the switching device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically switches between different semiconductor components based on operating conditions. The switching device can select which component to activate, allowing the system to adapt to different operational requirements and optimize performance for specific conditions rather than being fixed to a single characteristic set.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If a single semiconductor component design is used, then manufacturing and control are simplified, but the trade-off characteristic curve limits performance optimization to a single point

Engineering Contradiction:
Improvecomponent design uniformityVSAvoidpower loss optimization
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The unified semiconductor component is segmented into multiple specialized components with different characteristics. Instead of one component trying to balance all requirements, the system uses multiple components each optimized for specific aspects (conduction losses vs. switching losses). This segmentation resolves the contradiction by allowing specialized optimization while maintaining manageable system complexity through modular architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a composite semiconductor system by combining different types of semiconductor components in parallel. Each component acts as a 'material' with specific properties, and their combination creates a composite system that exhibits characteristics superior to any single component alone, allowing optimization beyond the trade-off curve of individual components.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentEP3358735B1Switching array for an electronic device
Publication Date: 2021.04.07 AUDI AG
  • EP3358735B1 patent drawingFigure 1a~1b
  • EP3358735B1 patent drawingFigure 2a~2b
  • EP3358735B1 patent drawingFigure 3

AI summary

The invention relates to a circuit arrangement (2) for an electronic device, comprising at least two identical semiconductor elements (10, 14, 16, 20) connected in parallel, wherein at least one first semiconductor element (10, 14, 16, 20) has a first characteristic and at least one second semiconductor element (10, 14, 16, 20) has a second characteristic, wherein each of the two characteristics is defined by at least one power dissipation, wherein the at least one power dissipation of the at least one first semiconductor element (10, 14, 16, 20) has a first value, wherein the at least one power dissipation of the at least one second semiconductor element (10, 14, 16, 20) has a second value, and wherein the two values ​​of the at least one power dissipation are different.