Parallel Signal Line Structure for Crosstalk-Stable Timing
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Solution Overview
Problem
Crosstalk between parallel adjacent signal lines in integrated circuits leads to data timing issues, requiring additional layout area for isolation wires and state keepers.
Innovation Solution
A signal line structure where each line is maintained in a drive state with only one driver active at a time, using gating inverters to control driver impedance based on enable signals, eliminating the need for isolation wires and state keepers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If isolation wires are inserted between parallel signal lines to prevent crosstalk, then signal timing consistency is improved, but layout area increases
Solution Approach 1:
The patent extracts and removes the isolation wires from the signal line structure. By maintaining signal lines in drive state, the need for isolation wires is eliminated, thus reducing layout area while maintaining signal integrity through the drive state mechanism rather than physical isolation
Solution Approach 2:
Instead of using isolation wires to prevent crosstalk by physical separation, the patent inverts the approach by using drive state to actively prevent crosstalk. The signal lines are kept in drive state with drivers actively controlling them, which prevents crosstalk-induced errors without requiring additional isolation structures
2Reliability
If state keepers are added to reduce crosstalk influence, then signal reliability is improved, but device complexity and layout area increase
Solution Approach 1:
The patent removes state keepers from the signal line structure. By maintaining signal lines in drive state throughout, the need for state keepers to preserve signal integrity is eliminated, reducing both device complexity and layout area while maintaining reliability through the continuous drive state
Solution Approach 2:
Instead of using state keepers to passively maintain signal state, the patent actively maintains signal lines in drive state using drivers. This active approach replaces the passive state keeping mechanism, reducing complexity while achieving the same reliability goal
3Stability of the object's composition
If signal lines are kept in drive state with dual drivers, then signal stability is improved, but crosstalk errors occur during transitions
Solution Approach 1:
The patent applies preliminary anti-action by controlling the drivers to ensure only one is in drive state at any given time. This prevents crosstalk-induced errors by proactively avoiding the condition where both drivers are simultaneously active, which would cause signal conflicts and errors
Solution Approach 2:
The patent uses dynamic control of driver states through enable signals. The drivers transition between drive state and high-impedance state based on enable signal levels, ensuring continuous signal stability while preventing crosstalk errors through controlled state transitions
Data Source
Figure 1~3A
Figure 3B~4
Figure 5~6
AI summary
The present disclosure provides a signal line structure, a signal line driving method, and a signal line circuit. The signal line structure includes a plurality of parallel signal lines, where each of the signal lines is maintained in a drive state at any time. Embodiments of the present disclosure can maintain high-speed and stable signal transmission while saving components and areas for wiring and related circuits.