Parallel Signature Computation for Low-Memory Cryptographic Processing

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Solution Overview

Problem

Existing cryptographic algorithms for digital signatures require significant memory for large data portions, leading to computational bottlenecks and inefficiencies.

Innovation Solution

An electronic device with multiple processors performs parallel computations, including hash value generation, sampling, and cumulative summation operations to generate digital signatures efficiently, utilizing CPUs for hashing and GPUs for multiplication, reducing the need for large memory storage and accelerating signature generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional cryptographic algorithms are used for digital signatures, then security and integrity are ensured, but significant memory is required for large data portions causing computational bottlenecks

Engineering Contradiction:
ImprovesecurityVSAvoidmemory requirement
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the cryptographic computation into multiple independent tasks that can be executed in parallel. The signature generation process is divided into separate computational steps (hash computation, matrix operations, sampling) that can be distributed across multiple processors, reducing the memory burden on any single processor while maintaining security through the complete execution of the cryptographic algorithm.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-processor execution to parallel multi-processor execution, adding a temporal dimension to the computation. By executing operations simultaneously across multiple processors rather than sequentially, the system reduces the effective memory requirement for any single computational step while maintaining the complete cryptographic computation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If traditional sequential computation is used for digital signatures, then simplicity is maintained, but computational efficiency and processing speed are reduced

Engineering Contradiction:
Improvecomputational processVSAvoidsignature generation speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The computational process is segmented into independent tasks that can be executed in parallel. The patent divides the signature generation into separate operations (hash computation, matrix multiplication, sampling) that can be distributed across multiple processors, increasing throughput while maintaining manageable complexity through clear task separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple computational operations into a unified parallel processing framework. By combining hash computation, matrix operations, and sampling into a coordinated parallel execution model, the system achieves higher productivity without proportionally increasing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If large data portions are processed in traditional cryptographic algorithms, then cryptographic security is maintained, but latency and processing time increase significantly

Engineering Contradiction:
Improvecryptographic securityVSAvoidprocessing latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the processing of large data portions into parallel computational tasks. By dividing the cryptographic operations into independent steps that can be executed simultaneously on multiple processors, the system reduces processing latency while maintaining the complete cryptographic computation required for security.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements continuous parallel processing where multiple operations proceed simultaneously without idle waiting. The parallel execution model allows hash computation, matrix operations, and sampling to proceed concurrently, eliminating bottlenecks and reducing overall processing time while maintaining cryptographic integrity.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20260012355A1Electronic device and method for parallel computation in cryptographic algorithm
Publication Date: 2026.01.08 SAMSUNG ELECTRONICS CO LTD
  • US20260012355A1 patent drawing
  • US20260012355A1 patent drawing
  • US20260012355A1 patent drawing

AI summary

An electronic device for generating an electronic signature includes a plurality of processors and at least one memory. The memory stores a first element derived from a private key corresponding to a message. The device is configured to generate a hash value by applying a hash function to a seed decoded from the private key. It performs an initial sampling to extract a second element from a sample matrix based on the hash value and generates a multiplication matrix through iterative parallel operations. The first parallel operation includes the first processor outputting the hash value and the second processor multiplying the first element and the second element to generate a multiplication result. The second parallel operation includes the first processor sampling additional second elements and the second processor performing a cumulative summation operation on the multiplication result. After validating the multiplication matrix, the device generates the electronic signature.