Parallel Simulation Using Ordered Priority Event Regions

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Solution Overview

Problem

Parallel simulation of electronic device designs is hindered by the use of semaphores to lock data memory locations, which slows down the simulation process as threads cannot access shared memory values simultaneously, defeating the purpose of using multiple threads for faster simulation.

Innovation Solution

The design under test is partitioned into multiple kernels that execute events in ordered priority event regions, with data synchronization occurring at the end of each processing phase, allowing all kernels to move to the next event region without locking shared objects, thus maintaining data correctness and speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semaphores are used to lock data memory locations for parallel simulation, then data correctness is maintained, but simulation speed decreases due to thread blocking

Engineering Contradiction:
Improvedata correctnessVSAvoidsimulation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The design is partitioned into multiple kernels, each responsible for simulating a specific partition. Each kernel has its own event queue and processes events independently, eliminating the need for semaphores to protect shared data structures. This segmentation allows parallel execution without locking overhead.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Event regions are established with predetermined priority levels before simulation begins. Events are categorized and placed in appropriate event queues based on their region and priority. This preliminary organization allows kernels to process events in a predetermined order without requiring runtime locking mechanisms.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple threads access shared memory simultaneously, then simulation speed increases, but data integrity is compromised

Engineering Contradiction:
Improvesimulation speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Shared memory is conceptually segmented into kernel-specific event queues. Each kernel reads from and writes to its own dedicated event queue, eliminating concurrent access to the same data structures. This segmentation maintains data integrity while allowing parallel execution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Event queues serve as intermediaries between kernels and the simulation state. Instead of kernels directly accessing shared memory, they interact through the event queue mechanism, which serializes access within each kernel while allowing parallel processing across kernels.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If kernels process events in different event regions simultaneously, then parallel processing efficiency increases, but coordination complexity increases

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidcoordination complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Event regions are pre-defined with explicit priority levels and processing orders before simulation starts. Each kernel knows in advance which event regions to process and in what order, eliminating the need for complex runtime coordination protocols. This preliminary structuring simplifies inter-kernel coordination.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses event region priority levels as a parameter to control processing order. By changing the priority parameter of event regions, the system automatically determines which kernels should process which events first, providing a simple mechanism for coordinating parallel kernels without complex communication.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8849644B2Parallel simulation using an ordered priority of event regions
Publication Date: 2014.09.30 SIEMENS INDUSTRY SOFTWARE INC
  • US8849644B2 patent drawing
  • US8849644B2 patent drawing
  • US8849644B2 patent drawing

AI summary

In one embodiment, a plurality of kernels are provided. Each kernel may simulate a partition of a design under test. A plurality of event regions are provided. The regions may be in an ordered priority. Events for the device under test may be determined for event regions in each of the kernels. An event region to execute events in is then determined and all kernels may execute events in the same event region. Kernels then execute events for the determined event region. When finished executing events in an event queue, data synchronization may occur. In this case, information may be synced among kernels, such as status and state values for shared objected are synchronized.