Parallel Simulation Segmentation for HILS Speed
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Solution Overview
Problem
Current simulation systems, such as hardware in the loop simulation (HILS), require extensive preparation and are time-consuming due to the need for physical hardware and real-time testing, which is costly and inefficient, especially when testing multiple scenarios.
Innovation Solution
A method for parallel execution of simulation programs using a graphical model with nodes as blocks and dependencies as links, where segments are generated, merged to reduce duplication, and allocated to multiple processors for accelerated execution, exploiting the state-space form of ordinary differential equations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware in the loop simulation (HILS) is used for testing, then testing accuracy is improved, but preparation time and cost increase significantly
Solution Approach 1:
The patent creates a software-based virtual model (copy) of the physical system that replicates its behavior and characteristics. This virtual model can be tested repeatedly without requiring physical hardware setup, thereby maintaining testing accuracy while dramatically reducing preparation time and costs associated with HILS
Solution Approach 2:
The patent replaces the mechanical/physical HILS system with a software-based virtual testing environment. By substituting physical hardware connections and real-time physical testing with computational models and software simulations, the system eliminates the need for extensive physical preparation while preserving testing validity
2Device complexity
If sequential execution is used for simulation programs, then program simplicity is maintained, but execution time increases
Solution Approach 1:
The patent divides the simulation program into multiple independent segments or tasks that can be executed concurrently. By identifying independent computational units within the simulation and allocating them to different processors, the system achieves parallel execution that accelerates computation while maintaining manageable program structure through modular organization
Solution Approach 2:
The patent transitions from single-dimensional sequential execution to multi-dimensional parallel execution by utilizing multiple processors simultaneously. This dimensional expansion allows independent simulation tasks to run concurrently across different processing units, dramatically increasing execution speed without complicating the fundamental program logic
3Productivity
If multiple processors are used for parallel execution, then execution speed is improved, but system complexity increases
Solution Approach 1:
The patent implements a universal parallel execution framework that can handle multiple simulation tasks across different processors using a consistent methodology. The segmentation and allocation mechanisms are designed to be processor-agnostic and task-agnostic, allowing the same system architecture to accommodate varying numbers of processors and different simulation types without requiring complex customizations
Data Source
AI summary
A method, system, and article of manufacture for solving ordinary differential equations described in a graphical model with nodes as blocks and dependencies as links using the processing of a computer with a plurality of processors. The method includes: generating segments of block with or without duplication for each block with an internal state and for each block without any output by traversing the graphical model from each block with an internal state to each block without any output; merging the segment to reduce duplication; compiling and converting each segment from the merged results in an executable code; and individually allocating the executable code for each segment to a plurality of processors for parallel execution.