Parallel Storage Circuitry for Single Event Upset Resilience
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Solution Overview
Problem
Existing storage circuitry techniques for mitigating single event upsets (SEUs) often increase area and power consumption by adding extra sequential elements or using error correction methods that result in significant overheads, such as increased latency and dynamic power usage.
Innovation Solution
Reconfiguring a second storage block to operate in parallel with a first storage block during a predetermined mode of operation where its function is otherwise unused, thereby enhancing the resilience of the first storage block to SEUs without significant area or power overhead, by utilizing existing storage circuitry components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If extra sequential elements or error correction methods are added to mitigate SEUs, then resilience to single event upsets is improved, but area and power consumption increase significantly
Solution Approach 1:
The second storage block is designed to perform multiple functions: its primary function for a first mode of operation, and a secondary function as a backup for the first storage block when the first mode of operation is inactive. This multi-functionality allows the same hardware resources to provide SEU mitigation without requiring dedicated error correction circuitry, thereby avoiding significant area overhead while improving resilience to single event upsets.
Solution Approach 2:
The invention recovers and reuses the second storage block when its primary function is not needed. Instead of leaving the storage block idle or using it for unrelated purposes, the system switches it to serve as a backup for the first storage block, providing error mitigation capabilities. This recovery approach ensures that existing hardware resources are fully utilized to improve reliability without adding extra components.
2Reliability
If extra sequential elements or error correction methods are added to mitigate SEUs, then resilience to single event upsets is improved, but power consumption increases significantly
Solution Approach 1:
The second storage block performs dual functions: executing its primary operation during a first mode, and serving as a backup for error mitigation during other modes. This eliminates the need for dedicated error correction circuitry that would continuously consume power, thereby improving SEU resilience without significant power overhead.
Solution Approach 2:
The system switches between operational modes periodically or conditionally, activating the backup function of the second storage block only when needed. This periodic switching ensures that the backup storage block and associated switching circuitry consume minimal power during normal operation, while still providing protection against SEUs when activated.
3Reliability
If error correction circuitry is added to detect and repair errors, then SEU resilience is improved, but latency increases
Solution Approach 1:
The second storage block is pre-configured and ready to serve as a backup, maintaining the same data as the first storage block. When an SEU occurs, the system can immediately switch to the pre-prepared backup data without needing to perform error detection and correction computations, thereby avoiding latency penalties while maintaining high SEU resilience.
Data Source
AI summary
Storage circuitry is provided with increased resilience to single event upsets, along with a method of operation of such circuitry. The storage circuitry has a first storage block configured in at least one mode of operation to perform a first storage function, and a second storage block configured in at least one mode of operation to perform a second storage function distinct from said first storage function. Configuration circuitry is responsive to a predetermined mode of operation where the second storage function is unused, to configure the second storage block to operate in parallel with the first storage block. By arranging the two storage blocks in parallel when one of the storage blocks is otherwise performing no useful function, this in effect increases the size of the storage block that is still performing the useful storage function, and as a result increases its resilience to single event upsets. Such an approach has minimal area and power consumption overhead, and provides a small storage circuit that can be readily used in a wide variety of sequential cell designs.