Parallel Semiconductor Switch Gate Wiring for Synchronized Switching
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Solution Overview
Problem
In power electronics, parallel-connected semiconductor switches often experience different switching times due to varying lead wire lengths, leading to uneven loading and potential overdimensioning, which shortens the service life and increases costs.
Innovation Solution
Adapting the resistance of lead wires by varying properties such as material purity, thickness, or composition to ensure all lead wires have the same electrical resistance, synchronizing the switching behavior of semiconductor switches without overdimensioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple parallel connected semiconductor switches are used to handle heavier currents, then the current carrying ability is improved, but the switching synchronization deteriorates due to different lead wire lengths causing different switching time points
Solution Approach 1:
The patent applies local quality by making each lead wire have different properties (cross-sectional area, material composition) tailored to its specific length and position. Shorter lead wires have smaller cross-sectional areas or lower conductivity materials, while longer lead wires have larger cross-sectional areas or higher conductivity materials, so that all lead wires achieve substantially equal resistance despite different lengths. This localized adaptation ensures synchronized switching of all semiconductor switches.
Solution Approach 2:
The patent changes physical parameters of the lead wires, specifically the cross-sectional area and material composition, to compensate for length differences. By adjusting these parameters, the resistance of each lead wire is optimized to achieve equal switching time points across all parallel connected semiconductor switches, resolving the synchronization issue while maintaining high current carrying ability.
2Reliability
If semiconductor switches are overdimensioned to handle initial full total current load, then the switching synchronization is improved, but the cost and service life deteriorate
Solution Approach 1:
The patent changes the resistance parameter of lead wires to achieve balanced current distribution during switching. By optimizing lead wire resistance to compensate for length differences, the switching time points are synchronized, allowing semiconductor switches to operate at their rated capacity without requiring overdimensioning. This reduces costs and extends service life while maintaining reliable switching synchronization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach synchronizes the switching behavior of semiconductor switches, reduces the need for overdimensioning, saves costs and design space, and enhances the robustness and longevity of power electronics devices.
Implementation Method 1
Adapting the resistance of lead wires by varying properties such as material purity, thickness, or composition to ensure all lead wires have the same electrical resistance, synchronizing the switching behavior of semiconductor switches
Data Source
AI summary
A power electronics arrangement, comprising an electrical conduction section, and a switching device which, in operation, switches the electrical conduction section. The switching device includes multiple parallel connected semiconductor switches which are triggered in common by a plurality of lead wires from a control unit and are switched across respective ones of the lead wire upon reaching a switching state of charge. Each of the lead wires has a same electrical resistance, and a different length.