Parallel Switch Sequencing for DUT Glitch Mitigation

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Solution Overview

Problem

Automated test equipment (ATE) systems experience undesired glitches or signal aberrations at the device under test (DUT) pins due to rapid transitions in test signal current ranges, which can cause false failure indications or mask actual failures, and existing solutions do not adequately mitigate these issues.

Innovation Solution

Implementing a control circuit to coordinate the operation of multiple parallel switch circuits with different resistance characteristics, allowing for controlled transitions between signal paths using a time-delayed sequence to minimize glitches, and utilizing feedback networks to adjust amplifier outputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If rapid transitions in test signal current ranges are used, then test signal switching speed is improved, but glitches at DUT pins are generated causing false failure indications

Engineering Contradiction:

Improvetest signal switching speedVSAvoidtest result accuracy

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The control circuit initiates the switching sequence in advance by first opening the first switch before closing the second switch. This preliminary action ensures that the current path is properly established before the transition completes, preventing glitches at the DUT pins while maintaining efficient switching speed.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The control circuit acts as an intermediary that coordinates the switching operations of multiple switches. It manages the timing and sequence of switch transitions, ensuring that the first switch opens before the second switch closes, thereby mediating between the need for rapid switching and the requirement to avoid test result errors.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If multiple parallel switch circuits are coordinated with time-delayed sequence, then glitches are reduced, but device complexity increases

Engineering Contradiction:

Improvesignal transition smoothnessVSAvoidswitching circuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The switching function is segmented into multiple independent switches (first switch and second switch) that can be controlled separately. This segmentation allows the control circuit to manage each switch independently with specific timing delays, achieving smooth transitions while keeping each individual switch relatively simple.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The switching circuit employs dynamic control where the timing and sequence of switch operations are adjusted based on the transition requirements. The control circuit dynamically manages the time-delayed sequence, enabling the system to adapt switching behavior to different test signal current ranges while maintaining manageable complexity through automated control.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS12540975B2125V switch glitch mitigation

Publication Date: 2026.02.03 ANALOG DEVICES INT UNLTD CO

AI summary

A signal driver system can include one or more force amplifiers configured to provide drive signals to an output node, such as a device under test (DUT) node. The system can include a first switch circuit coupled between a first force amplifier and the output node, and the first switch circuit can include multiple parallel instances of switch circuits with respective different resistance characteristics. The system can include a second switch circuit coupled between a second force amplifier and the output node. The system can include a control circuit configured to control the switch circuit instances of the first switch circuit to mitigate glitch at the output node, for example, when switching between the first and second drive signals.