Switching circuit capable of reducing parasitic capacitance variation

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Solution Overview

Problem

Integrated circuits with parallel-connected switches experience significant variations in parasitic capacitance due to on/off operations, affecting circuit characteristics and performance accuracy.

Innovation Solution

A switching circuit design featuring a main switch array and an auxiliary switch array, both connected in parallel, with control circuits to maintain a threshold number of turned-on switch elements, stabilizing the total number of active switches and reducing parasitic capacitance variation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If switches are configured in parallel connection to adjust circuit characteristics, then the adaptability of the integrated circuit is improved, but the parasitic capacitance variation increases

Engineering Contradiction:
Improvecircuit characteristics adjustmentVSAvoidparasitic capacitance
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

A dummy switch array is introduced as an intermediary component to compensate for parasitic capacitance variations. The dummy switch array does not directly participate in the primary switching function but serves to balance the total parasitic capacitance by turning on complementary switches when main switches change state, thereby maintaining stable total capacitance while enabling circuit characteristic adjustment

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple switches are turned on or off to adjust circuit performance, then the circuitry characteristics can be modified, but the operating performance accuracy deteriorates due to parasitic capacitance variation

Engineering Contradiction:
Improvecircuitry characteristicsVSAvoidoperating performance accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The invention changes the parameter of total switched-on switch count to maintain constant parasitic capacitance. By dynamically adjusting which switches are on (changing switch configuration parameters) while keeping the total number constant, the circuit can modify its characteristics through different switch combinations without affecting the total capacitance value, thus maintaining operating performance accuracy

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10530358B2Switching circuit capable of reducing parasitic capacitance variation
Publication Date: 2020.01.07 REALTEK SEMICON CORP
  • US10530358B2 patent drawing
  • US10530358B2 patent drawing

AI summary

A switching circuit includes: a main switch array including multiple main switch elements respectively arranged on multiple main signal paths configured in a parallel connection, wherein the multiple main signal paths are coupled with a first circuit node; a main switch control circuit for controlling the multiple main switch elements; an auxiliary switch array including multiple auxiliary switch elements respectively arranged on multiple auxiliary signal paths configured in a parallel connection, wherein the multiple auxiliary signal paths are also coupled with the first circuit node; and an auxiliary switch control circuit for controlling the multiple auxiliary switch elements so as to maintain a total number of turned-on switch elements in the main switch array and the auxiliary switch array to be equal to or more than a threshold quantity.